| Message ID | 1486046099-17726-16-git-send-email-batuzovk@ispras.ru |
|---|---|
| State | New |
| Headers | show |
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d0352e2..8a1f70e 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -990,7 +990,6 @@ static void read_vec_element(DisasContext *s, TCGv_i64 tcg_dest, int srcidx, tcg_gen_ld32s_i64(tcg_dest, cpu_env, vect_off); break; case MO_64: - case MO_64|MO_SIGN: tcg_gen_ld_i64(tcg_dest, cpu_env, vect_off); break; default:
MO_64|MO_SIGN is not a valid TCGMemOp. This code compiles only because by coincidence this value equals to MO_SSIGN mask defined in the same enum. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> --- Bugfix which is only indirectly related to this series. Other changes of the series exposed the problem. --- target/arm/translate-a64.c | 1 - 1 file changed, 1 deletion(-)