From patchwork Mon Jan 9 16:24:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 712867 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ty1bp2HBKz9sBR for ; Tue, 10 Jan 2017 03:59:50 +1100 (AEDT) Received: from localhost ([::1]:41202 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cQdIR-0005YS-TF for incoming@patchwork.ozlabs.org; Mon, 09 Jan 2017 11:59:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45414) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cQclm-00016D-4a for qemu-devel@nongnu.org; Mon, 09 Jan 2017 11:26:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cQcli-0004Kq-43 for qemu-devel@nongnu.org; Mon, 09 Jan 2017 11:26:02 -0500 Received: from 6.mo178.mail-out.ovh.net ([46.105.53.132]:59019) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cQclh-0004KH-UV for qemu-devel@nongnu.org; Mon, 09 Jan 2017 11:25:58 -0500 Received: from player714.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 8538CD339 for ; Mon, 9 Jan 2017 17:25:55 +0100 (CET) Received: from zorba.kaod.org.com (LFbn-1-2234-107.w90-76.abo.wanadoo.fr [90.76.55.107]) (Authenticated sender: clg@kaod.org) by player714.ha.ovh.net (Postfix) with ESMTPSA id 9BCD03C00A9; Mon, 9 Jan 2017 17:25:46 +0100 (CET) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Peter Crosthwaite Date: Mon, 9 Jan 2017 17:24:42 +0100 Message-Id: <1483979087-32663-7-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483979087-32663-1-git-send-email-clg@kaod.org> References: <1483979087-32663-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 13372031720395213650 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelgedrvdeggdeltdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.53.132 Subject: [Qemu-devel] [PATCH v2 06/11] aspeed/smc: adjust the size of the register region X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-devel@nongnu.org, Marcin Krzeminski Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The SPI controller of the AST2400 SoC has less registers. So we can adjust the size of the memory region holding the registers depending on the controller type. We can also remove the guest_error logging which is useless as the range of the region is strict enough. Signed-off-by: Cédric Le Goater Reviewed-by: Joel Stanley --- hw/ssi/aspeed_smc.c | 25 ++++++++++--------------- include/hw/ssi/aspeed_smc.h | 1 + 2 files changed, 11 insertions(+), 15 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 1ab5575dc848..7103d0c5b64a 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -130,6 +130,9 @@ #define R_SPI_MISC_CTRL (0x10 / 4) #define R_SPI_TIMINGS (0x14 / 4) +#define ASPEED_SMC_R_SPI_MAX (0x20 / 4) +#define ASPEED_SMC_R_SMC_MAX (0x20 / 4) + #define ASPEED_SOC_SMC_FLASH_BASE 0x10000000 #define ASPEED_SOC_FMC_FLASH_BASE 0x20000000 #define ASPEED_SOC_SPI_FLASH_BASE 0x30000000 @@ -185,6 +188,7 @@ static const AspeedSMCController controllers[] = { .flash_window_base = ASPEED_SOC_SMC_FLASH_BASE, .flash_window_size = 0x6000000, .has_dma = false, + .nregs = ASPEED_SMC_R_SMC_MAX, }, { .name = "aspeed.smc.fmc", .r_conf = R_CONF, @@ -197,6 +201,7 @@ static const AspeedSMCController controllers[] = { .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE, .flash_window_size = 0x10000000, .has_dma = true, + .nregs = ASPEED_SMC_R_MAX, }, { .name = "aspeed.smc.spi", .r_conf = R_SPI_CONF, @@ -209,6 +214,7 @@ static const AspeedSMCController controllers[] = { .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE, .flash_window_size = 0x10000000, .has_dma = false, + .nregs = ASPEED_SMC_R_SPI_MAX, }, { .name = "aspeed.smc.ast2500-fmc", .r_conf = R_CONF, @@ -221,6 +227,7 @@ static const AspeedSMCController controllers[] = { .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE, .flash_window_size = 0x10000000, .has_dma = true, + .nregs = ASPEED_SMC_R_MAX, }, { .name = "aspeed.smc.ast2500-spi1", .r_conf = R_CONF, @@ -233,6 +240,7 @@ static const AspeedSMCController controllers[] = { .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE, .flash_window_size = 0x8000000, .has_dma = false, + .nregs = ASPEED_SMC_R_MAX, }, { .name = "aspeed.smc.ast2500-spi2", .r_conf = R_CONF, @@ -245,6 +253,7 @@ static const AspeedSMCController controllers[] = { .flash_window_base = ASPEED_SOC_SPI2_FLASH_BASE, .flash_window_size = 0x8000000, .has_dma = false, + .nregs = ASPEED_SMC_R_MAX, }, }; @@ -522,13 +531,6 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size) addr >>= 2; - if (addr >= ARRAY_SIZE(s->regs)) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: Out-of-bounds read at 0x%" HWADDR_PRIx "\n", - __func__, addr); - return 0; - } - if (addr == s->r_conf || addr == s->r_timings || addr == s->r_ce_ctrl || @@ -551,13 +553,6 @@ static void aspeed_smc_write(void *opaque, hwaddr addr, uint64_t data, addr >>= 2; - if (addr >= ARRAY_SIZE(s->regs)) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: Out-of-bounds write at 0x%" HWADDR_PRIx "\n", - __func__, addr); - return; - } - if (addr == s->r_conf || addr == s->r_timings || addr == s->r_ce_ctrl) { @@ -625,7 +620,7 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp) /* The memory region for the controller registers */ memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_ops, s, - s->ctrl->name, ASPEED_SMC_R_MAX * 4); + s->ctrl->name, s->ctrl->nregs * 4); sysbus_init_mmio(sbd, &s->mmio); /* diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index 861120b6e213..e811742728f8 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -45,6 +45,7 @@ typedef struct AspeedSMCController { hwaddr flash_window_base; uint32_t flash_window_size; bool has_dma; + uint32_t nregs; } AspeedSMCController; typedef struct AspeedSMCFlash {