diff mbox

[v1,3/9] target-ppc: implement stxvl instruction

Message ID 1481135102-20011-4-git-send-email-nikunj@linux.vnet.ibm.com
State New
Headers show

Commit Message

Nikunj A Dadhania Dec. 7, 2016, 6:24 p.m. UTC
stxvl: Store VSX Vector with Length

Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Vector (8-bit elements) in LE:
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
|00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
+--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

Storing 14 bytes would result in following Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
 target-ppc/helper.h                 |  1 +
 target-ppc/mem_helper.c             | 25 +++++++++++++++++++++++++
 target-ppc/translate/vsx-impl.inc.c |  1 +
 target-ppc/translate/vsx-ops.inc.c  |  1 +
 4 files changed, 28 insertions(+)

Comments

David Gibson Dec. 8, 2016, 10:26 p.m. UTC | #1
On Wed, Dec 07, 2016 at 11:54:56PM +0530, Nikunj A Dadhania wrote:
> stxvl: Store VSX Vector with Length
> 
> Vector (8-bit elements) in BE:
> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
> |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
> 
> Vector (8-bit elements) in LE:
> +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
> |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|
> +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
> 
> Storing 14 bytes would result in following Little/Big-endian Storage:
> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
> |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
> 
> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>

As with lxvl/lxvll I think you should be able to share the helper for
stxvl and stxvll.

> ---
>  target-ppc/helper.h                 |  1 +
>  target-ppc/mem_helper.c             | 25 +++++++++++++++++++++++++
>  target-ppc/translate/vsx-impl.inc.c |  1 +
>  target-ppc/translate/vsx-ops.inc.c  |  1 +
>  4 files changed, 28 insertions(+)
> 
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 67c8b71..5ddc96d 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -319,6 +319,7 @@ DEF_HELPER_3(stvehx, void, env, avr, tl)
>  DEF_HELPER_3(stvewx, void, env, avr, tl)
>  DEF_HELPER_4(lxvl, void, env, tl, tl, tl)
>  DEF_HELPER_4(lxvll, void, env, tl, tl, tl)
> +DEF_HELPER_4(stxvl, void, env, tl, tl, tl)
>  DEF_HELPER_4(vsumsws, void, env, avr, avr, avr)
>  DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr)
>  DEF_HELPER_4(vsum4sbs, void, env, avr, avr, avr)
> diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
> index 08fd90d..771c660 100644
> --- a/target-ppc/mem_helper.c
> +++ b/target-ppc/mem_helper.c
> @@ -334,6 +334,31 @@ void helper_lxvll(CPUPPCState *env, target_ulong addr,
>      putVSR(xt_num, &xt, env);
>  }
>  
> +void helper_stxvl(CPUPPCState *env, target_ulong addr,
> +                  target_ulong xt_num, target_ulong rb)
> +{
> +    int i;
> +    ppc_vsr_t xt;
> +    target_ulong nb = GET_NB(rb);
> +
> +    if (!nb) {
> +        return;
> +    }
> +    getVSR(xt_num, &xt, env);
> +    nb = (nb >= 16) ? 16 : nb;
> +    if (msr_le) {
> +        for (i = 16; i > 16 - nb; i--) {
> +            cpu_stb_data_ra(env, addr, xt.VsrB(i - 1), GETPC());
> +            addr = addr_add(env, addr, 1);
> +        }
> +    } else {
> +        for (i = 0; i < nb; i++) {
> +            cpu_stb_data_ra(env, addr, xt.VsrB(i), GETPC());
> +            addr = addr_add(env, addr, 1);
> +        }
> +    }
> +}
> +
>  #undef HI_IDX
>  #undef LO_IDX
>  #undef GET_NB
> diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c
> index ee884cf..6d61285 100644
> --- a/target-ppc/translate/vsx-impl.inc.c
> +++ b/target-ppc/translate/vsx-impl.inc.c
> @@ -267,6 +267,7 @@ static void gen_##name(DisasContext *ctx)                       \
>  
>  VSX_VECTOR_LOAD_STORE_LENGTH(lxvl)
>  VSX_VECTOR_LOAD_STORE_LENGTH(lxvll)
> +VSX_VECTOR_LOAD_STORE_LENGTH(stxvl)
>  
>  #define VSX_LOAD_SCALAR_DS(name, operation)                       \
>  static void gen_##name(DisasContext *ctx)                         \
> diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c
> index 88f46d9..76eba3c 100644
> --- a/target-ppc/translate/vsx-ops.inc.c
> +++ b/target-ppc/translate/vsx-ops.inc.c
> @@ -23,6 +23,7 @@ GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX),
>  GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE,  PPC2_ISA300),
>  GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300),
>  GEN_HANDLER_E(stxvx, 0x1F, 0x0C, 0x0C, 0, PPC_NONE, PPC2_ISA300),
> +GEN_HANDLER_E(stxvl, 0x1F, 0x0D, 0x0C, 0, PPC_NONE, PPC2_ISA300),
>  
>  GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207),
>  GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),
Nikunj A Dadhania Dec. 9, 2016, 5:54 a.m. UTC | #2
David Gibson <david@gibson.dropbear.id.au> writes:

> [ Unknown signature status ]

> On Wed, Dec 07, 2016 at 11:54:56PM +0530, Nikunj A Dadhania wrote:

>> stxvl: Store VSX Vector with Length

>> 

>> Vector (8-bit elements) in BE:

>> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

>> |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|

>> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

>> 

>> Vector (8-bit elements) in LE:

>> +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

>> |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"|

>> +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+

>> 

>> Storing 14 bytes would result in following Little/Big-endian Storage:

>> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

>> |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|

>> +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+

>> 

>> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>

>

> As with lxvl/lxvll I think you should be able to share the helper for

> stxvl and stxvll.


Sure, will do that.

Regards
Nikunj
diff mbox

Patch

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 67c8b71..5ddc96d 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -319,6 +319,7 @@  DEF_HELPER_3(stvehx, void, env, avr, tl)
 DEF_HELPER_3(stvewx, void, env, avr, tl)
 DEF_HELPER_4(lxvl, void, env, tl, tl, tl)
 DEF_HELPER_4(lxvll, void, env, tl, tl, tl)
+DEF_HELPER_4(stxvl, void, env, tl, tl, tl)
 DEF_HELPER_4(vsumsws, void, env, avr, avr, avr)
 DEF_HELPER_4(vsum2sws, void, env, avr, avr, avr)
 DEF_HELPER_4(vsum4sbs, void, env, avr, avr, avr)
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index 08fd90d..771c660 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -334,6 +334,31 @@  void helper_lxvll(CPUPPCState *env, target_ulong addr,
     putVSR(xt_num, &xt, env);
 }
 
+void helper_stxvl(CPUPPCState *env, target_ulong addr,
+                  target_ulong xt_num, target_ulong rb)
+{
+    int i;
+    ppc_vsr_t xt;
+    target_ulong nb = GET_NB(rb);
+
+    if (!nb) {
+        return;
+    }
+    getVSR(xt_num, &xt, env);
+    nb = (nb >= 16) ? 16 : nb;
+    if (msr_le) {
+        for (i = 16; i > 16 - nb; i--) {
+            cpu_stb_data_ra(env, addr, xt.VsrB(i - 1), GETPC());
+            addr = addr_add(env, addr, 1);
+        }
+    } else {
+        for (i = 0; i < nb; i++) {
+            cpu_stb_data_ra(env, addr, xt.VsrB(i), GETPC());
+            addr = addr_add(env, addr, 1);
+        }
+    }
+}
+
 #undef HI_IDX
 #undef LO_IDX
 #undef GET_NB
diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c
index ee884cf..6d61285 100644
--- a/target-ppc/translate/vsx-impl.inc.c
+++ b/target-ppc/translate/vsx-impl.inc.c
@@ -267,6 +267,7 @@  static void gen_##name(DisasContext *ctx)                       \
 
 VSX_VECTOR_LOAD_STORE_LENGTH(lxvl)
 VSX_VECTOR_LOAD_STORE_LENGTH(lxvll)
+VSX_VECTOR_LOAD_STORE_LENGTH(stxvl)
 
 #define VSX_LOAD_SCALAR_DS(name, operation)                       \
 static void gen_##name(DisasContext *ctx)                         \
diff --git a/target-ppc/translate/vsx-ops.inc.c b/target-ppc/translate/vsx-ops.inc.c
index 88f46d9..76eba3c 100644
--- a/target-ppc/translate/vsx-ops.inc.c
+++ b/target-ppc/translate/vsx-ops.inc.c
@@ -23,6 +23,7 @@  GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX),
 GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE,  PPC2_ISA300),
 GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300),
 GEN_HANDLER_E(stxvx, 0x1F, 0x0C, 0x0C, 0, PPC_NONE, PPC2_ISA300),
+GEN_HANDLER_E(stxvl, 0x1F, 0x0D, 0x0C, 0, PPC_NONE, PPC2_ISA300),
 
 GEN_HANDLER_E(mfvsrwz, 0x1F, 0x13, 0x03, 0x0000F800, PPC_NONE, PPC2_VSX207),
 GEN_HANDLER_E(mtvsrwa, 0x1F, 0x13, 0x06, 0x0000F800, PPC_NONE, PPC2_VSX207),