From patchwork Wed Nov 23 13:01:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 698237 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tP2hZ6pzLz9ryv for ; Thu, 24 Nov 2016 00:08:30 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bTjZmNHi"; dkim-atps=neutral Received: from localhost ([::1]:33667 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c9XHo-0003M6-56 for incoming@patchwork.ozlabs.org; Wed, 23 Nov 2016 08:08:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34793) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c9XCE-00071W-Jw for qemu-devel@nongnu.org; Wed, 23 Nov 2016 08:02:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c9XC9-0004P1-Jm for qemu-devel@nongnu.org; Wed, 23 Nov 2016 08:02:42 -0500 Received: from mail-oi0-x241.google.com ([2607:f8b0:4003:c06::241]:33366) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c9XC9-0004Ot-Ea for qemu-devel@nongnu.org; Wed, 23 Nov 2016 08:02:37 -0500 Received: by mail-oi0-x241.google.com with SMTP id f201so919050oib.0 for ; Wed, 23 Nov 2016 05:02:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=VBUlfTIfbYd+l9mdtR6wETM4m+C1WCGSXruwRkENftg=; b=bTjZmNHiS768fVppuBaaprOzgSdvdwTYRuuN2usc/FrlYs4HaHQNEl4prsH0HWsja4 TaHa37ipZrwI8AVnSZPpzEJwz6Z1UYYkDQBljbmmKhBpNavAptQ9dLlJBt1qArfn8RLT DNuPNiCkEbivOehPKLuzQ5m4OpP+pLfQGT7QDppZnkZ5x/kZfFcXjNE1zs3lA1MCR07L 7/WVA860zKPN3WxWnW29yywS7r15hoyCPU4N6N07mKBW0loDngqR8LElRp3wN7kexEFP ESKzEy7MO8CCtC+v+/LYAYNeThbnpQ9q11/hYi13kr7j/Uj9rnMw4xhhFqRSOvSUrDh3 iKkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=VBUlfTIfbYd+l9mdtR6wETM4m+C1WCGSXruwRkENftg=; b=eDI4YIrlW4ooTvO5Gkz+urKocC6A+bleIwA7Q/eY2Q0Xc5x1+PAd/qZEt0kGUOj0M1 Q47ZsHTUgR8UdkbxiTCPe7c3jEQfk5QBaJ4UXluPqXu8XpOtZ2Ch4Q7Ux3YFbN00krfP 2pWN73mfr0Ly8qYrXUGW+EZDjV7bnOGyhmdPxTEZIPNc3jsZHH76lZ3yR2+a9OCeVVxz tzJpe9iyjDU0sMg3GxNIGlnlLYNXYhXKzCiB+jbPuWCkDMtGgLpJ6ecebnJaDhsFeW0P LgbNO31amSLeo4pDDLR8abxvS7qW6hmUccVcsqNoIJF8YBAULqJHIKWRDVsItYS1Km/J QwQw== X-Gm-Message-State: AKaTC01Q7Le5IPk95Vsu6cIMkmaaVQrc8uTdp3VerR+YnHzbdopbLha40jOFv8K/k1mcpw== X-Received: by 10.157.38.162 with SMTP id l31mr1508966otb.21.1479906156659; Wed, 23 Nov 2016 05:02:36 -0800 (PST) Received: from bigtime.twiddle.net.twiddle.net ([172.56.6.66]) by smtp.gmail.com with ESMTPSA id t184sm10260000oie.21.2016.11.23.05.02.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 Nov 2016 05:02:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 23 Nov 2016 14:01:02 +0100 Message-Id: <1479906121-12211-6-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479906121-12211-1-git-send-email-rth@twiddle.net> References: <1479906121-12211-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:4003:c06::241 Subject: [Qemu-devel] [PATCH v4 05/64] tcg/arm: Move isa detection to tcg-target.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée --- tcg/arm/tcg-target.h | 36 ++++++++++++++++++++++++++++++++---- tcg/arm/tcg-target.inc.c | 41 +---------------------------------------- 2 files changed, 33 insertions(+), 44 deletions(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 8e724be..d1fe12b 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -26,6 +26,37 @@ #ifndef ARM_TCG_TARGET_H #define ARM_TCG_TARGET_H +/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ +#ifndef __ARM_ARCH +# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ + || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ + || defined(__ARM_ARCH_7EM__) +# define __ARM_ARCH 7 +# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ + || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ + || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) +# define __ARM_ARCH 6 +# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5E__) \ + || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \ + || defined(__ARM_ARCH_5TEJ__) +# define __ARM_ARCH 5 +# else +# define __ARM_ARCH 4 +# endif +#endif + +extern int arm_arch; + +#if defined(__ARM_ARCH_5T__) \ + || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5TEJ__) +# define use_armv5t_instructions 1 +#else +# define use_armv5t_instructions use_armv6_instructions +#endif + +#define use_armv6_instructions (__ARM_ARCH >= 6 || arm_arch >= 6) +#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7) + #undef TCG_TARGET_STACK_GROWSUP #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 @@ -79,7 +110,7 @@ extern bool use_idiv_instructions; #define TCG_TARGET_HAS_eqv_i32 0 #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 -#define TCG_TARGET_HAS_deposit_i32 1 +#define TCG_TARGET_HAS_deposit_i32 use_armv7_instructions #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 @@ -90,9 +121,6 @@ extern bool use_idiv_instructions; #define TCG_TARGET_HAS_div_i32 use_idiv_instructions #define TCG_TARGET_HAS_rem_i32 0 -extern bool tcg_target_deposit_valid(int ofs, int len); -#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid - enum { TCG_AREG0 = TCG_REG_R6, }; diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index ffa0d40..1415c27 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -25,36 +25,7 @@ #include "elf.h" #include "tcg-be-ldst.h" -/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */ -#ifndef __ARM_ARCH -# if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \ - || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \ - || defined(__ARM_ARCH_7EM__) -# define __ARM_ARCH 7 -# elif defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \ - || defined(__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \ - || defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__) -# define __ARM_ARCH 6 -# elif defined(__ARM_ARCH_5__) || defined(__ARM_ARCH_5E__) \ - || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \ - || defined(__ARM_ARCH_5TEJ__) -# define __ARM_ARCH 5 -# else -# define __ARM_ARCH 4 -# endif -#endif - -static int arm_arch = __ARM_ARCH; - -#if defined(__ARM_ARCH_5T__) \ - || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5TEJ__) -# define use_armv5t_instructions 1 -#else -# define use_armv5t_instructions use_armv6_instructions -#endif - -#define use_armv6_instructions (__ARM_ARCH >= 6 || arm_arch >= 6) -#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7) +int arm_arch = __ARM_ARCH; #ifndef use_idiv_instructions bool use_idiv_instructions; @@ -730,16 +701,6 @@ static inline void tcg_out_bswap32(TCGContext *s, int cond, int rd, int rn) } } -bool tcg_target_deposit_valid(int ofs, int len) -{ - /* ??? Without bfi, we could improve over generic code by combining - the right-shift from a non-zero ofs with the orr. We do run into - problems when rd == rs, and the mask generated from ofs+len doesn't - fit into an immediate. We would have to be careful not to pessimize - wrt the optimizations performed on the expanded code. */ - return use_armv7_instructions; -} - static inline void tcg_out_deposit(TCGContext *s, int cond, TCGReg rd, TCGArg a1, int ofs, int len, bool const_a1) {