From patchwork Wed Nov 16 20:03:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 695808 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tJwSM4kscz9t0J for ; Thu, 17 Nov 2016 07:13:39 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="LF2yHFiI"; dkim-atps=neutral Received: from localhost ([::1]:54598 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c76aO-0002NX-T8 for incoming@patchwork.ozlabs.org; Wed, 16 Nov 2016 15:13:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56058) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c76RB-0002VA-39 for qemu-devel@nongnu.org; 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#define TCG_TARGET_HAS_bswap16_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_bswap32_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_deposit_i32 use_mips32r2_instructions -#define TCG_TARGET_HAS_extract_i32 0 +#define TCG_TARGET_HAS_extract_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_ext8s_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_ext16s_i32 use_mips32r2_instructions diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index abce602..1ecae08 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -1637,6 +1637,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_deposit_i32: tcg_out_opc_bf(s, OPC_INS, a0, a2, args[3] + args[4] - 1, args[3]); break; + case INDEX_op_extract_i32: + tcg_out_opc_bf(s, OPC_EXT, a0, a1, a2 + args[3] - 1, a2); + break; case INDEX_op_brcond_i32: tcg_out_brcond(s, a2, a0, a1, arg_label(args[3])); @@ -1736,6 +1739,7 @@ static const TCGTargetOpDef mips_op_defs[] = { { INDEX_op_ext16s_i32, { "r", "rZ" } }, { INDEX_op_deposit_i32, { "r", "0", "rZ" } }, + { INDEX_op_extract_i32, { "r", "r" } }, { INDEX_op_brcond_i32, { "rZ", "rZ" } }, #if use_mips32r6_instructions