From patchwork Wed Nov 16 19:25:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 695796 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tJw5w1MBXz9s65 for ; Thu, 17 Nov 2016 06:57:40 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JM5ic0K4"; dkim-atps=neutral Received: from localhost ([::1]:54479 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c76Kv-0005LI-EQ for incoming@patchwork.ozlabs.org; Wed, 16 Nov 2016 14:57:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45700) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c75qj-0004M9-KI for qemu-devel@nongnu.org; Wed, 16 Nov 2016 14:26:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c75qh-00062F-Fd for qemu-devel@nongnu.org; Wed, 16 Nov 2016 14:26:25 -0500 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:34416) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c75qh-00061c-62 for qemu-devel@nongnu.org; Wed, 16 Nov 2016 14:26:23 -0500 Received: by mail-wm0-x242.google.com with SMTP id g23so14398468wme.1 for ; Wed, 16 Nov 2016 11:26:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:subject:date:message-id:in-reply-to:references; bh=fFG78rq4vgZmyhToJfj+p940AYJxiN9UfRoMMiQfLk4=; b=JM5ic0K4rLHN4oxbw5q86W4eeqnn11C3XsNlkqjUrH86RBHzXWagSq+w3In4DFSn50 iMhUv+xzZENtlp811d/Way+2Cb0jZVg8dBaDjQP9bDsLKPgALqpyy0CBueIL3uStCiOi CITN+Zu4JRq3ao56lATDG7dX6KYDvnCwmn2EykHwETtzSeYdhDOoMosJJI+b7DZIiCmM 0JLurRQbQ1rf24Dh98638BjSC0XRHRZCPztfFGITHQrSzNL0MlAb2wbzxqaimW3AqLQE wgt1qgpC/Xq9RajrtM8S/jyiRKaSNGx67aUd4WG6PWj1HIsdZEmZFcXrZpp70NNFW9xO C4CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:subject:date:message-id :in-reply-to:references; bh=fFG78rq4vgZmyhToJfj+p940AYJxiN9UfRoMMiQfLk4=; b=XKhzLO+bdTSmdf8hmx3iNhtCKdK14dHuUnPUJ6PHbK0cPf8Xni1w1kDTmkvniuCWLF h0vAsRyLntuAqHqH1PPFc78iLu2k2LrLQKCZz0enyoMxLZJ26PN4spPUa575okGme58M j5fWznaL1Gy2eHlOb83xErkuzir04P12zNe3ShuVsEFaNtFlmDnZaaDoe4W9Vgx6j+hk YK2DW9DLkbKBeWyhInAp1573crgwcdcSh4Rz8xx19sRDVWj0bS1csWtf38laCjJFlFHA 3GiVU9LkHOZI4ruLpdqcT1jrgySTpTOWbmttcStugjV8s9QIfjWIj4I51ukFBfmsikGI hSBw== X-Gm-Message-State: ABUngvfJDRYxh7lE546ZZuqh4ZovZ5O9mEWYEjEwgQNSDgWue36IVpfaOOM3eklBvm1Z5A== X-Received: by 10.194.222.132 with SMTP id qm4mr3699740wjc.150.1479324381775; Wed, 16 Nov 2016 11:26:21 -0800 (PST) Received: from bigtime.twiddle.net ([87.111.149.139]) by smtp.gmail.com with ESMTPSA id 197sm686930wmy.16.2016.11.16.11.26.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Nov 2016 11:26:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 16 Nov 2016 20:25:32 +0100 Message-Id: <1479324335-2074-23-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479324335-2074-1-git-send-email-rth@twiddle.net> References: <1479324335-2074-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [PATCH 22/25] tcg: Add helpers for clrsb X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The number of actual invocations does not warrent an opcode, and the backends generating it. But at least we can eliminate redundant helpers. Signed-off-by: Richard Henderson --- tcg-runtime.c | 10 ++++++++++ tcg/tcg-op.c | 28 ++++++++++++++++++++++++++++ tcg/tcg-op.h | 4 ++++ tcg/tcg-runtime.h | 2 ++ 4 files changed, 44 insertions(+) diff --git a/tcg-runtime.c b/tcg-runtime.c index eb3bade..c8b98df 100644 --- a/tcg-runtime.c +++ b/tcg-runtime.c @@ -121,6 +121,16 @@ uint64_t HELPER(ctz_i64)(uint64_t arg, uint64_t zero_val) return arg ? ctz64(arg) : zero_val; } +uint32_t HELPER(clrsb_i32)(uint32_t arg) +{ + return clrsb32(arg); +} + +uint64_t HELPER(clrsb_i64)(uint64_t arg) +{ + return clrsb64(arg); +} + void HELPER(exit_atomic)(CPUArchState *env) { cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC()); diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index b45095c..728c4b3 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -489,6 +489,20 @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2) tcg_temp_free_i32(t); } +void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg) +{ + if (TCG_TARGET_HAS_clz_i32) { + TCGv_i32 t = tcg_temp_new_i32(); + tcg_gen_sari_i32(t, arg, 31); + tcg_gen_xor_i32(t, t, arg); + tcg_gen_clzi_i32(t, t, 32); + tcg_gen_subi_i32(ret, t, 1); + tcg_temp_free_i32(t); + } else { + gen_helper_clrsb_i32(ret, arg); + } +} + void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { if (TCG_TARGET_HAS_rot_i32) { @@ -1789,6 +1803,20 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2) } } +void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg) +{ + if (TCG_TARGET_HAS_clz_i64 || TCG_TARGET_HAS_clz_i32) { + TCGv_i64 t = tcg_temp_new_i64(); + tcg_gen_sari_i64(t, arg, 63); + tcg_gen_xor_i64(t, t, arg); + tcg_gen_clzi_i64(t, t, 64); + tcg_gen_subi_i64(ret, t, 1); + tcg_temp_free_i64(t); + } else { + gen_helper_clrsb_i64(ret, arg); + } +} + void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { if (TCG_TARGET_HAS_rot_i64) { diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 7a24e84..c2f3db9 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -290,6 +290,7 @@ void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2); void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2); +void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2); void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); @@ -477,6 +478,7 @@ void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2); void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2); +void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2); void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); @@ -970,6 +972,7 @@ void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp); #define tcg_gen_ctz_tl tcg_gen_ctz_i64 #define tcg_gen_clzi_tl tcg_gen_clzi_i64 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i64 +#define tcg_gen_clrsb_tl tcg_gen_clrsb_i64 #define tcg_gen_rotl_tl tcg_gen_rotl_i64 #define tcg_gen_rotli_tl tcg_gen_rotli_i64 #define tcg_gen_rotr_tl tcg_gen_rotr_i64 @@ -1065,6 +1068,7 @@ void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp); #define tcg_gen_ctz_tl tcg_gen_ctz_i32 #define tcg_gen_clzi_tl tcg_gen_clzi_i32 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i32 +#define tcg_gen_clrsb_tl tcg_gen_clrsb_i32 #define tcg_gen_rotl_tl tcg_gen_rotl_i32 #define tcg_gen_rotli_tl tcg_gen_rotli_i32 #define tcg_gen_rotr_tl tcg_gen_rotr_i32 diff --git a/tcg/tcg-runtime.h b/tcg/tcg-runtime.h index eb1cd76..0d30f1a 100644 --- a/tcg/tcg-runtime.h +++ b/tcg/tcg-runtime.h @@ -19,6 +19,8 @@ DEF_HELPER_FLAGS_2(clz_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32) DEF_HELPER_FLAGS_2(ctz_i32, TCG_CALL_NO_RWG_SE, i32, i32, i32) DEF_HELPER_FLAGS_2(clz_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(ctz_i64, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_1(clrsb_i32, TCG_CALL_NO_RWG_SE, i32, i32) +DEF_HELPER_FLAGS_1(clrsb_i64, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_1(exit_atomic, TCG_CALL_NO_WG, noreturn, env)