From patchwork Thu Oct 27 00:42:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 687409 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t47gD4SXwz9t37 for ; Thu, 27 Oct 2016 11:53:44 +1100 (AEDT) Received: from localhost ([::1]:38267 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzYwv-0001Ke-U5 for incoming@patchwork.ozlabs.org; Wed, 26 Oct 2016 20:53:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57261) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzYmd-0001Gq-9g for qemu-devel@nongnu.org; Wed, 26 Oct 2016 20:43:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzYma-0000xH-5Y for qemu-devel@nongnu.org; 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V01:K0:dDxnjGAwbKo=:S5NM1wZh0/7xYdsJOrg29j DlluLYKqNWTWcHqY6szyL7MRJjyMF7KUaHTRt4t0A/2/9aFsH/4NzO1n4htCmDcZvh/xsr7Ih vYqNDFPDYQlVecPyiLPtgudD55LrWeGgsljBIOOdsqEmVopkpjRB1nlV5LdAMhYtXLvanQusI vws3RRkhZZzxbeYGkXHhpQtzNQjK+GP/QfBrLbfHuk6IA49gL2PMl0rQpwULJoXs1+jaLqeaw d4xTyXoFDCGPFVhsnlXe8xJtUw//gKp+yZtAKPcakK6QCQ7G5BZPA4AKhc1Vmp6j2kYEtpXu3 4PbhxOLyPWyLEsDzKR3naZiaPH0KNFLnJtF5QHjpzh1FhUoG3ctGrAL4gKD5idY68fD+V8HwL RKOfYBHHB1dL195/rtoWh7tXt5FQlbAQ6ghpef0rFF6OhF641G77tNRN4sqztOmhrFIXVte9m uls4JGq48su4/iqORayHt+PpKSVCAoIrcK5HSanNzVcYhHIsmvZaw7AGgSkQOC/OSSMzqgT5Y Non1KnpMIdlRCZEk9MBT+eYSzHVkDSE99TzCqiWQQ3mjyeger5bhD4NF40CoEo+h0BhVp+3RT hPVDMwTjKojPSBDsI8KXMT1bXySOzgC17HoKceRuqMrGz4yoJgUAhJpaQj/8hQEU4aG1gdzma 1Vy3aTll/qzgBil2upPIPPg96xSaiQziduX2GksoXkBn5D697HGfBk2pWwVam7eArQ1k= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.134 Subject: [Qemu-devel] [PATCH v2 04/17] target-m68k: add addressing modes to scc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index b407623..e595673 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1008,25 +1008,6 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) free_cond(&c); } -DISAS_INSN(scc) -{ - DisasCompare c; - int cond; - TCGv reg, tmp; - - cond = (insn >> 8) & 0xf; - gen_cc_cond(&c, s, cond); - - tmp = tcg_temp_new(); - tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); - free_cond(&c); - - reg = DREG(insn, 0); - tcg_gen_neg_i32(tmp, tmp); - tcg_gen_deposit_i32(reg, reg, tmp, 0, 8); - tcg_temp_free(tmp); -} - /* Force a TB lookup after an instruction that changes the CPU state. */ static void gen_lookup_tb(DisasContext *s) { @@ -1106,6 +1087,24 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest) s->is_jmp = DISAS_TB_JUMP; } +DISAS_INSN(scc) +{ + DisasCompare c; + int cond; + TCGv tmp; + + cond = (insn >> 8) & 0xf; + gen_cc_cond(&c, s, cond); + + tmp = tcg_temp_new(); + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); + free_cond(&c); + + tcg_gen_neg_i32(tmp, tmp); + DEST_EA(env, insn, OS_BYTE, tmp, NULL); + tcg_temp_free(tmp); +} + DISAS_INSN(undef_mac) { gen_exception(s, s->pc - 2, EXCP_LINEA); @@ -3136,7 +3135,8 @@ void register_m68k_insns (CPUM68KState *env) INSN(jump, 4ec0, ffc0, M68000); INSN(addsubq, 5000, f080, M68000); INSN(addsubq, 5080, f0c0, M68000); - INSN(scc, 50c0, f0f8, CF_ISA_A); + INSN(scc, 50c0, f0f8, CF_ISA_A); /* Scc.B Dx */ + INSN(scc, 50c0, f0c0, M68000); /* Scc.B */ INSN(addsubq, 5080, f1c0, CF_ISA_A); INSN(tpf, 51f8, fff8, CF_ISA_A);