From patchwork Tue Oct 11 19:40:44 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 680886 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3stnmw5F02z9ryZ for ; Wed, 12 Oct 2016 06:56:16 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=n7rwsrpZ; dkim-atps=neutral Received: from localhost ([::1]:57675 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bu39o-0006mA-TC for incoming@patchwork.ozlabs.org; Tue, 11 Oct 2016 15:56:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bu2w2-0003W6-5D for qemu-devel@nongnu.org; Tue, 11 Oct 2016 15:41:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bu2vy-0001tM-DL for qemu-devel@nongnu.org; Tue, 11 Oct 2016 15:41:57 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:35256) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bu2vy-0001sj-38 for qemu-devel@nongnu.org; Tue, 11 Oct 2016 15:41:54 -0400 Received: by mail-pf0-x242.google.com with SMTP id s8so935508pfj.2 for ; Tue, 11 Oct 2016 12:41:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Iu38dlQFEePmFKZeU2HuWdnuP2PZv3nA8Ftdf+bjTJs=; b=n7rwsrpZRght1sazGiEumPTtjT/7gNGWokr8TIKHA+tGioly0XR2XtoTyR18yqIYI1 pHlW/W2iVLnlkXrnI1zncue7/YFoPn1hEuqL1mGOBrXbvO8MdEGRmLsKlO/DGmlzLLaa 7KtvkX9ywjkMAvelMsoFnyGANIEuQN0XhJjFAhvDlCp5NP/I/wjiHRA5DTGEbUwqPRa4 lN6bLUABIznal7OU5wzHwbufcB2cV5OghXhrH+ArbULPyh6gAVulmCMnfA8ZlBp/PO9I pLJKF6pFInMi/KYKfoPrwk+dybvqdBGWIv7wAHLhSf1FIpDPs/oE42dSBh53USw1Mo9o FoBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Iu38dlQFEePmFKZeU2HuWdnuP2PZv3nA8Ftdf+bjTJs=; b=jzg8sDnOCip9lEJTce4oSJDIVa09/9jwmu25zt/5bGZSrgJwcD368qe1E0R2xS6eYe u4Xn+O23iK4hpTuTpuEOT41u0ThbfMnVNjPwbiAp3YBeDs24AX5Ue1cwPrSshLZL2Fmc 1Szu2tkCu1yHQ06vjkKMeeOnI4fnKYngVttlD4BZ4z11Vph2hsMyYI/BH4zwdIfQ5kqZ nSJuvq2lJC/2NIcIQGCL0EAYE6sAAjdNjX7MDuDyBP/Ox7xSRkPbP0yR6q1SdvmbAL4H zHFAI7W6Z4sNnDpVLQoAQQDOyBoMO3/waAhjBKNnIwgPC2/K0bIethm2ViIGTe9YI3c4 3oJQ== X-Gm-Message-State: AA6/9Rl6YiembJsWbxMBG/hSrheKDsgt+lBasDUZT9UYr8eccL9cPJmkuLJVpwWnJgGP0w== X-Received: by 10.99.248.21 with SMTP id n21mr3581868pgh.35.1476214913440; Tue, 11 Oct 2016 12:41:53 -0700 (PDT) Received: from bigtime.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id j63sm6197571pfg.32.2016.10.11.12.41.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Oct 2016 12:41:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 11 Oct 2016 14:40:44 -0500 Message-Id: <1476214861-31658-19-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1476214861-31658-1-git-send-email-rth@twiddle.net> References: <1476214861-31658-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PATCH v6 18/35] target-i386: emulate LOCK'ed OP instructions using atomic helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Emilio G. Cota" , alex.bennee@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" [rth: Eliminate some unnecessary temporaries.] Signed-off-by: Emilio G. Cota Message-Id: <1467054136-10430-13-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson --- target-i386/translate.c | 76 +++++++++++++++++++++++++++++++++++++------------ 1 file changed, 58 insertions(+), 18 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 5d9790a..b5c7791 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1258,55 +1258,95 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d) { if (d != OR_TMP0) { gen_op_mov_v_reg(ot, cpu_T0, d); - } else { + } else if (!(s1->prefix & PREFIX_LOCK)) { gen_op_ld_v(s1, ot, cpu_T0, cpu_A0); } switch(op) { case OP_ADCL: gen_compute_eflags_c(s1, cpu_tmp4); - tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); - tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_tmp4); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_add_tl(cpu_T0, cpu_tmp4, cpu_T1); + tcg_gen_atomic_add_fetch_tl(cpu_T0, cpu_A0, cpu_T0, + s1->mem_index, ot | MO_LE); + } else { + tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); + tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_tmp4); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update3_cc(cpu_tmp4); set_cc_op(s1, CC_OP_ADCB + ot); break; case OP_SBBL: gen_compute_eflags_c(s1, cpu_tmp4); - tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_T1); - tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_tmp4); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_add_tl(cpu_T0, cpu_T1, cpu_tmp4); + tcg_gen_neg_tl(cpu_T0, cpu_T0); + tcg_gen_atomic_add_fetch_tl(cpu_T0, cpu_A0, cpu_T0, + s1->mem_index, ot | MO_LE); + } else { + tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_T1); + tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_tmp4); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update3_cc(cpu_tmp4); set_cc_op(s1, CC_OP_SBBB + ot); break; case OP_ADDL: - tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_atomic_add_fetch_tl(cpu_T0, cpu_A0, cpu_T1, + s1->mem_index, ot | MO_LE); + } else { + tcg_gen_add_tl(cpu_T0, cpu_T0, cpu_T1); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update2_cc(); set_cc_op(s1, CC_OP_ADDB + ot); break; case OP_SUBL: - tcg_gen_mov_tl(cpu_cc_srcT, cpu_T0); - tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_neg_tl(cpu_T0, cpu_T1); + tcg_gen_atomic_fetch_add_tl(cpu_cc_srcT, cpu_A0, cpu_T0, + s1->mem_index, ot | MO_LE); + tcg_gen_sub_tl(cpu_T0, cpu_cc_srcT, cpu_T1); + } else { + tcg_gen_mov_tl(cpu_cc_srcT, cpu_T0); + tcg_gen_sub_tl(cpu_T0, cpu_T0, cpu_T1); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update2_cc(); set_cc_op(s1, CC_OP_SUBB + ot); break; default: case OP_ANDL: - tcg_gen_and_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_atomic_and_fetch_tl(cpu_T0, cpu_A0, cpu_T1, + s1->mem_index, ot | MO_LE); + } else { + tcg_gen_and_tl(cpu_T0, cpu_T0, cpu_T1); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update1_cc(); set_cc_op(s1, CC_OP_LOGICB + ot); break; case OP_ORL: - tcg_gen_or_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_atomic_or_fetch_tl(cpu_T0, cpu_A0, cpu_T1, + s1->mem_index, ot | MO_LE); + } else { + tcg_gen_or_tl(cpu_T0, cpu_T0, cpu_T1); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update1_cc(); set_cc_op(s1, CC_OP_LOGICB + ot); break; case OP_XORL: - tcg_gen_xor_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_st_rm_T0_A0(s1, ot, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_atomic_xor_fetch_tl(cpu_T0, cpu_A0, cpu_T1, + s1->mem_index, ot | MO_LE); + } else { + tcg_gen_xor_tl(cpu_T0, cpu_T0, cpu_T1); + gen_op_st_rm_T0_A0(s1, ot, d); + } gen_op_update1_cc(); set_cc_op(s1, CC_OP_LOGICB + ot); break;