From patchwork Thu Sep 15 12:45:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 670391 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sZdtp191Mz9sD6 for ; Thu, 15 Sep 2016 23:05:22 +1000 (AEST) Received: from localhost ([::1]:34459 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkWLv-0000X7-MF for incoming@patchwork.ozlabs.org; Thu, 15 Sep 2016 09:05:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49704) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkW3v-0002OA-Sa for qemu-devel@nongnu.org; Thu, 15 Sep 2016 08:46:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkW3r-0007sj-Md for qemu-devel@nongnu.org; Thu, 15 Sep 2016 08:46:42 -0400 Received: from 9.mo177.mail-out.ovh.net ([46.105.72.238]:44969) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkW3r-0007sE-H2 for qemu-devel@nongnu.org; Thu, 15 Sep 2016 08:46:39 -0400 Received: from player699.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo177.mail-out.ovh.net (Postfix) with ESMTP id 8747DFFCE56 for ; Thu, 15 Sep 2016 14:46:36 +0200 (CEST) Received: from hermes.kaod.org.com (LFbn-1-2234-107.w90-76.abo.wanadoo.fr [90.76.55.107]) (Authenticated sender: clg@kaod.org) by player699.ha.ovh.net (Postfix) with ESMTPSA id C2AB624009B; Thu, 15 Sep 2016 14:46:30 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-ppc@nongnu.org Date: Thu, 15 Sep 2016 14:45:54 +0200 Message-Id: <1473943560-14846-5-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473943560-14846-1-git-send-email-clg@kaod.org> References: <1473943560-14846-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 10965139195204963155 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeluddrjeehgdehfeculddtuddrfeeltddrtddtmdcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 46.105.72.238 Subject: [Qemu-devel] [PATCH v3 04/10] ppc/pnv: add a PIR handler to PnvChip X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cedric Le Goater , qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" P9 and P8 have some differences in the CPU PIR encoding. Signed-off-by: Cédric Le Goater --- hw/ppc/pnv.c | 14 ++++++++++++++ include/hw/ppc/pnv.h | 1 + 2 files changed, 15 insertions(+) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ec7dd6ac5ea1..f4c125503249 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -238,6 +238,16 @@ static void ppc_powernv_init(MachineState *machine) g_free(chip_typename); } +static uint32_t pnv_chip_core_pir_p8(PnvChip *chip, uint32_t core_id) +{ + return (chip->chip_id << 7) | (core_id << 3); +} + +static uint32_t pnv_chip_core_pir_p9(PnvChip *chip, uint32_t core_id) +{ + return (chip->chip_id << 8) | (core_id << 2); +} + /* Allowed core identifiers on a POWER8 Processor Chip : * * @@ -273,6 +283,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data) k->chip_type = PNV_CHIP_POWER8E; k->chip_cfam_id = 0x221ef04980000000ull; /* P8 Murano DD2.1 */ k->cores_mask = POWER8E_CORE_MASK; + k->core_pir = pnv_chip_core_pir_p8; dc->desc = "PowerNV Chip POWER8E"; } @@ -292,6 +303,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass, void *data) k->chip_type = PNV_CHIP_POWER8; k->chip_cfam_id = 0x220ea04980000000ull; /* P8 Venice DD2.0 */ k->cores_mask = POWER8_CORE_MASK; + k->core_pir = pnv_chip_core_pir_p8; dc->desc = "PowerNV Chip POWER8"; } @@ -311,6 +323,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass *klass, void *data) k->chip_type = PNV_CHIP_POWER8NVL; k->chip_cfam_id = 0x120d304980000000ull; /* P8 Naples DD1.0 */ k->cores_mask = POWER8_CORE_MASK; + k->core_pir = pnv_chip_core_pir_p8; dc->desc = "PowerNV Chip POWER8NVL"; } @@ -330,6 +343,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass, void *data) k->chip_type = PNV_CHIP_POWER9; k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */ k->cores_mask = POWER9_CORE_MASK; + k->core_pir = pnv_chip_core_pir_p9; dc->desc = "PowerNV Chip POWER9"; } diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index cfc32586320f..2bd2294ac2a3 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -58,6 +58,7 @@ typedef struct PnvChipClass { uint64_t cores_mask; void (*realize)(PnvChip *dev, Error **errp); + uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); } PnvChipClass; #define TYPE_PNV_CHIP_POWER8E TYPE_PNV_CHIP "-POWER8E"