From patchwork Thu Aug 11 15:24:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 658275 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3s9C4s2RWgz9sBf for ; Fri, 12 Aug 2016 01:44:45 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b=QKAsrRkD; dkim-atps=neutral Received: from localhost ([::1]:49243 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bXs9z-0008UE-1o for incoming@patchwork.ozlabs.org; Thu, 11 Aug 2016 11:44:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bXrqf-0003pO-AF for qemu-devel@nongnu.org; Thu, 11 Aug 2016 11:24:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bXrqd-0006eR-W4 for qemu-devel@nongnu.org; Thu, 11 Aug 2016 11:24:45 -0400 Received: from mail-wm0-x235.google.com ([2a00:1450:400c:c09::235]:37448) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bXrqd-0006eJ-Li for qemu-devel@nongnu.org; Thu, 11 Aug 2016 11:24:43 -0400 Received: by mail-wm0-x235.google.com with SMTP id i5so3251748wmg.0 for ; Thu, 11 Aug 2016 08:24:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=33s3dWyfGdj7ULAf/+jBby+ckm5lsdt+Rt1ql+MtjE4=; b=QKAsrRkDmp1kB+WwEPLY03O5OHrgnvWTnrhjCUoOli81LizV2DnLqFOhOJt/bqkz6U ZgML/DuBKXm/9p6tyX/J8o7wcQgGytzhz9StD3fFcHXoymv7Np2nl0rr+iiifwrThqJq PJy2yQsYECHL0VJNBVUlsgss28n4oeuxofe6o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=33s3dWyfGdj7ULAf/+jBby+ckm5lsdt+Rt1ql+MtjE4=; b=LqJ2RPh/SBjg/LIP5ftYULzth2Wixwphx+0WTlDjVqD8tvVGlJ6Cvqnr7PZlbnyMmp nIqdIYrThD9mvKXW31KwJ9/2vXbYqT+g/PqJfYnB4IikNWjaY0Y2hU6wX6B5pr2yfSGX Q2fRMonsVEX3puUCddFP4f2rySDQko8MUnKYwGRzqPb2yGyzs2FjbnZR8ov9NzUH0A7R n8LafeNDdOOzk8eUMnwELTe2gmir9t14KbvXEdRFv6n6oyjlfh28kM/jicuCaoP82CkZ 6mOc2rp+kK9GXyU6/Ltnw49jnzGZ+yjV2P1ddmfCdCJyS4N9tNQrg8O7So22/u2YNXLv rpMQ== X-Gm-Message-State: AEkoouv1zES1jErkM7B3XawGT8bJ/apQGIPxPZHzV0ggOKUfDgAaFBhzHWGx8zhsvYoXtuqN X-Received: by 10.28.39.134 with SMTP id n128mr9483798wmn.60.1470929082843; Thu, 11 Aug 2016 08:24:42 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id r67sm300912wmb.14.2016.08.11.08.24.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Aug 2016 08:24:31 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 4D57F3E0323; Thu, 11 Aug 2016 16:24:31 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: mttcg@listserver.greensocs.com, qemu-devel@nongnu.org, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com Date: Thu, 11 Aug 2016 16:24:15 +0100 Message-Id: <1470929064-4092-20-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1470929064-4092-1-git-send-email-alex.bennee@linaro.org> References: <1470929064-4092-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::235 Subject: [Qemu-devel] [RFC v4 19/28] tcg: move locking for tb_invalidate_phys_page_range up X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, claudio.fontana@huawei.com, Peter Crosthwaite , jan.kiszka@siemens.com, mark.burton@greensocs.com, serge.fdrv@gmail.com, pbonzini@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" In the linux-user case all things that involve ''l1_map' and PageDesc tweaks are protected by the memory lock (mmpa_lock). For SoftMMU mode we previously relied on single threaded behaviour, with MTTCG we now use the tb_lock(). As a result we need to do a little re-factoring and push the taking of this lock up the call tree. This requires a slightly different entry for the SoftMMU and user-mode cases from tb_invalidate_phys_range. This also means user-mode breakpoint insertion needs to take two locks but it hadn't taken any previously so this is an improvement. Signed-off-by: Alex Bennée --- v4 - reword commit message --- exec.c | 16 ++++++++++++++++ translate-all.c | 37 +++++++++++++++++++++++++++++-------- 2 files changed, 45 insertions(+), 8 deletions(-) diff --git a/exec.c b/exec.c index a39a200..f418725 100644 --- a/exec.c +++ b/exec.c @@ -722,7 +722,11 @@ void cpu_exec_init(CPUState *cpu, Error **errp) #if defined(CONFIG_USER_ONLY) static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) { + mmap_lock(); + tb_lock(); tb_invalidate_phys_page_range(pc, pc + 1, 0); + tb_unlock(); + mmap_unlock(); } #else static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) @@ -731,6 +735,7 @@ static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs); int asidx = cpu_asidx_from_attrs(cpu, attrs); if (phys != -1) { + /* Locks grabbed by tb_invalidate_phys_addr */ tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as, phys | (pc & ~TARGET_PAGE_MASK)); } @@ -2009,7 +2014,11 @@ ram_addr_t qemu_ram_addr_from_host(void *ptr) static void notdirty_mem_write(void *opaque, hwaddr ram_addr, uint64_t val, unsigned size) { + bool locked = false; + if (!cpu_physical_memory_get_dirty_flag(ram_addr, DIRTY_MEMORY_CODE)) { + locked = true; + tb_lock(); tb_invalidate_phys_page_fast(ram_addr, size); } switch (size) { @@ -2025,6 +2034,11 @@ static void notdirty_mem_write(void *opaque, hwaddr ram_addr, default: abort(); } + + if (locked) { + tb_unlock(); + } + /* Set both VGA and migration bits for simplicity and to remove * the notdirty callback faster. */ @@ -2505,7 +2519,9 @@ static void invalidate_and_set_dirty(MemoryRegion *mr, hwaddr addr, cpu_physical_memory_range_includes_clean(addr, length, dirty_log_mask); } if (dirty_log_mask & (1 << DIRTY_MEMORY_CODE)) { + tb_lock(); tb_invalidate_phys_range(addr, addr + length); + tb_unlock(); dirty_log_mask &= ~(1 << DIRTY_MEMORY_CODE); } cpu_physical_memory_set_dirty_range(addr, length, dirty_log_mask); diff --git a/translate-all.c b/translate-all.c index c650696..c53ae8c 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1363,12 +1363,11 @@ TranslationBlock *tb_gen_code(CPUState *cpu, * access: the virtual CPU will exit the current TB if code is modified inside * this TB. * - * Called with mmap_lock held for user-mode emulation + * Called with mmap_lock held for user-mode emulation, grabs tb_lock + * Called with tb_lock held for system-mode emulation */ -void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) +static void tb_invalidate_phys_range_1(tb_page_addr_t start, tb_page_addr_t end) { - assert_memory_lock(); - while (start < end) { tb_invalidate_phys_page_range(start, end, 0); start &= TARGET_PAGE_MASK; @@ -1376,6 +1375,21 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) } } +#ifdef CONFIG_SOFTMMU +void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) +{ + assert_tb_lock(); + tb_invalidate_phys_range_1(start, end); +} +#else +void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) +{ + assert_memory_lock(); + tb_lock(); + tb_invalidate_phys_range_1(start, end); + tb_unlock(); +} +#endif /* * Invalidate all TBs which intersect with the target physical address range * [start;end[. NOTE: start and end must refer to the *same* physical page. @@ -1383,7 +1397,8 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) * access: the virtual CPU will exit the current TB if code is modified inside * this TB. * - * Called with mmap_lock held for user-mode emulation + * Called with tb_lock/mmap_lock held for user-mode emulation + * Called with tb_lock held for system-mode emulation */ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, int is_cpu_write_access) @@ -1406,6 +1421,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, #endif /* TARGET_HAS_PRECISE_SMC */ assert_memory_lock(); + assert_tb_lock(); p = page_find(start >> TARGET_PAGE_BITS); if (!p) { @@ -1420,7 +1436,6 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, /* we remove all the TBs in the range [start, end[ */ /* XXX: see if in some cases it could be faster to invalidate all the code */ - tb_lock(); tb = p->first_tb; while (tb != NULL) { n = (uintptr_t)tb & 3; @@ -1480,12 +1495,12 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, cpu_loop_exit_noexc(cpu); } #endif - tb_unlock(); } #ifdef CONFIG_SOFTMMU /* len must be <= 8 and start must be a multiple of len. - * Called via softmmu_template.h, with iothread mutex not held. + * Called via softmmu_template.h when code areas are written to with + * tb_lock held. */ void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len) { @@ -1500,6 +1515,8 @@ void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len) (intptr_t)cpu_single_env->segs[R_CS].base); } #endif + assert_memory_lock(); + p = page_find(start >> TARGET_PAGE_BITS); if (!p) { return; @@ -1547,6 +1564,8 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc) uint32_t current_flags = 0; #endif + assert_memory_lock(); + addr &= TARGET_PAGE_MASK; p = page_find(addr >> TARGET_PAGE_BITS); if (!p) { @@ -1650,7 +1669,9 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr) return; } ram_addr = memory_region_get_ram_addr(mr) + addr; + tb_lock(); tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0); + tb_unlock(); rcu_read_unlock(); } #endif /* !defined(CONFIG_USER_ONLY) */