From patchwork Wed Jul 27 06:56:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 653152 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rzmsM3P22z9s1h for ; Wed, 27 Jul 2016 17:32:07 +1000 (AEST) Received: from localhost ([::1]:44566 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSJK1-000160-6d for incoming@patchwork.ozlabs.org; Wed, 27 Jul 2016 03:32:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37072) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSIp5-0005SZ-3N for qemu-devel@nongnu.org; Wed, 27 Jul 2016 03:00:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bSIp0-0005J5-T5 for qemu-devel@nongnu.org; Wed, 27 Jul 2016 03:00:05 -0400 Received: from gate.crashing.org ([63.228.1.57]:56943) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSIp0-0005It-I2; Wed, 27 Jul 2016 03:00:02 -0400 Received: from pasglop.ozlabs.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id u6R6wWFm001953; Wed, 27 Jul 2016 01:59:34 -0500 From: Benjamin Herrenschmidt To: qemu-ppc@nongnu.org Date: Wed, 27 Jul 2016 16:56:29 +1000 Message-Id: <1469602609-31349-11-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1469602609-31349-1-git-send-email-benh@kernel.crashing.org> References: <1469602609-31349-1-git-send-email-benh@kernel.crashing.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 63.228.1.57 Subject: [Qemu-devel] [PATCHv2 11/31] ppc: FP exceptions are always precise X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We don't implement imprecise FP exceptions and using store_current which sets SRR1 to the *previous* instruction never makes sense for these. So let's be truthful and make them precise, which is allowed by the architecture. Signed-off-by: Benjamin Herrenschmidt --- target-ppc/excp_helper.c | 11 ++++++----- target-ppc/translate.c | 1 - 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 96c6fd9..02d9e79 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -274,12 +274,13 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->error_code = 0; return; } + + /* FP exceptions always have NIP pointing to the faulting + * instruction, so always use store_next and claim we are + * precise in the MSR. + */ msr |= 0x00100000; - if (msr_fe0 == msr_fe1) { - goto store_next; - } - msr |= 0x00010000; - break; + goto store_next; case POWERPC_EXCP_INVAL: LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip); msr |= 0x00080000; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3cfa40f..ba14bda 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3060,7 +3060,6 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA, int reg, int size) { TCGv t0 = tcg_temp_new(); - uint32_t save_exception = ctx->exception; tcg_gen_st_tl(EA, cpu_env, offsetof(CPUPPCState, reserve_ea)); tcg_gen_movi_tl(t0, (size << 5) | reg);