| Message ID | 1469571686-7284-21-git-send-email-benh@kernel.crashing.org |
|---|---|
| State | New |
| Headers | show |
On Wed, Jul 27, 2016 at 08:21:15AM +1000, Benjamin Herrenschmidt wrote: > This is no longer necessary as the helpers will properly retrieve > the return address when needed. Is this right? Don't the tw etc. instructions continue on rather than retrying if an exception occurs? > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> > --- > target-ppc/excp_helper.c | 6 ++++-- > target-ppc/translate.c | 8 -------- > 2 files changed, 4 insertions(+), 10 deletions(-) > > diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c > index 570d188..c31bbad 100644 > --- a/target-ppc/excp_helper.c > +++ b/target-ppc/excp_helper.c > @@ -1031,7 +1031,8 @@ void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2, > ((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) || > ((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) || > ((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) { > - raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > + POWERPC_EXCP_TRAP, GETPC()); > } > } > > @@ -1044,7 +1045,8 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2, > ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) || > ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) || > ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) { > - raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > + POWERPC_EXCP_TRAP, GETPC()); > } > } > #endif > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index 8f5afba..7163b19 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -3365,8 +3365,6 @@ static void gen_sc(DisasContext *ctx) > static void gen_tw(DisasContext *ctx) > { > TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); > - /* Update the nip since this might generate a trap exception */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], > t0); > tcg_temp_free_i32(t0); > @@ -3377,8 +3375,6 @@ static void gen_twi(DisasContext *ctx) > { > TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); > TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); > - /* Update the nip since this might generate a trap exception */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); > tcg_temp_free(t0); > tcg_temp_free_i32(t1); > @@ -3389,8 +3385,6 @@ static void gen_twi(DisasContext *ctx) > static void gen_td(DisasContext *ctx) > { > TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); > - /* Update the nip since this might generate a trap exception */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], > t0); > tcg_temp_free_i32(t0); > @@ -3401,8 +3395,6 @@ static void gen_tdi(DisasContext *ctx) > { > TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); > TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); > - /* Update the nip since this might generate a trap exception */ > - gen_update_nip(ctx, ctx->nip - 4); > gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); > tcg_temp_free(t0); > tcg_temp_free_i32(t1);
On Wed, 2016-07-27 at 12:26 +1000, David Gibson wrote: > On Wed, Jul 27, 2016 at 08:21:15AM +1000, Benjamin Herrenschmidt > wrote: > > > > This is no longer necessary as the helpers will properly retrieve > > the return address when needed. > > Is this right? Don't the tw etc. instructions continue on rather > than retrying if an exception occurs? What do you mean ? I'm not sure I understand... Cheers, Ben. > > > > > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> > > --- > > target-ppc/excp_helper.c | 6 ++++-- > > target-ppc/translate.c | 8 -------- > > 2 files changed, 4 insertions(+), 10 deletions(-) > > > > diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c > > index 570d188..c31bbad 100644 > > --- a/target-ppc/excp_helper.c > > +++ b/target-ppc/excp_helper.c > > @@ -1031,7 +1031,8 @@ void helper_tw(CPUPPCState *env, target_ulong > > arg1, target_ulong arg2, > > ((int32_t)arg1 == (int32_t)arg2 && (flags & > > 0x04)) || > > ((uint32_t)arg1 < (uint32_t)arg2 && (flags & > > 0x02)) || > > ((uint32_t)arg1 > (uint32_t)arg2 && (flags & > > 0x01))))) { > > - raise_exception_err(env, POWERPC_EXCP_PROGRAM, > > POWERPC_EXCP_TRAP); > > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > > + POWERPC_EXCP_TRAP, GETPC()); > > } > > } > > > > @@ -1044,7 +1045,8 @@ void helper_td(CPUPPCState *env, target_ulong > > arg1, target_ulong arg2, > > ((int64_t)arg1 == (int64_t)arg2 && (flags & > > 0x04)) || > > ((uint64_t)arg1 < (uint64_t)arg2 && (flags & > > 0x02)) || > > ((uint64_t)arg1 > (uint64_t)arg2 && (flags & > > 0x01))))) { > > - raise_exception_err(env, POWERPC_EXCP_PROGRAM, > > POWERPC_EXCP_TRAP); > > + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, > > + POWERPC_EXCP_TRAP, GETPC()); > > } > > } > > #endif > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > > index 8f5afba..7163b19 100644 > > --- a/target-ppc/translate.c > > +++ b/target-ppc/translate.c > > @@ -3365,8 +3365,6 @@ static void gen_sc(DisasContext *ctx) > > static void gen_tw(DisasContext *ctx) > > { > > TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); > > - /* Update the nip since this might generate a trap exception > > */ > > - gen_update_nip(ctx, ctx->nip - 4); > > gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], > > cpu_gpr[rB(ctx->opcode)], > > t0); > > tcg_temp_free_i32(t0); > > @@ -3377,8 +3375,6 @@ static void gen_twi(DisasContext *ctx) > > { > > TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); > > TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); > > - /* Update the nip since this might generate a trap exception > > */ > > - gen_update_nip(ctx, ctx->nip - 4); > > gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); > > tcg_temp_free(t0); > > tcg_temp_free_i32(t1); > > @@ -3389,8 +3385,6 @@ static void gen_twi(DisasContext *ctx) > > static void gen_td(DisasContext *ctx) > > { > > TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); > > - /* Update the nip since this might generate a trap exception > > */ > > - gen_update_nip(ctx, ctx->nip - 4); > > gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], > > cpu_gpr[rB(ctx->opcode)], > > t0); > > tcg_temp_free_i32(t0); > > @@ -3401,8 +3395,6 @@ static void gen_tdi(DisasContext *ctx) > > { > > TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); > > TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); > > - /* Update the nip since this might generate a trap exception > > */ > > - gen_update_nip(ctx, ctx->nip - 4); > > gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); > > tcg_temp_free(t0); > > tcg_temp_free_i32(t1); >
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 570d188..c31bbad 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -1031,7 +1031,8 @@ void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2, ((int32_t)arg1 == (int32_t)arg2 && (flags & 0x04)) || ((uint32_t)arg1 < (uint32_t)arg2 && (flags & 0x02)) || ((uint32_t)arg1 > (uint32_t)arg2 && (flags & 0x01))))) { - raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_TRAP, GETPC()); } } @@ -1044,7 +1045,8 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2, ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) || ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) || ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) { - raise_exception_err(env, POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_TRAP, GETPC()); } } #endif diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 8f5afba..7163b19 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3365,8 +3365,6 @@ static void gen_sc(DisasContext *ctx) static void gen_tw(DisasContext *ctx) { TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); - /* Update the nip since this might generate a trap exception */ - gen_update_nip(ctx, ctx->nip - 4); gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); tcg_temp_free_i32(t0); @@ -3377,8 +3375,6 @@ static void gen_twi(DisasContext *ctx) { TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); - /* Update the nip since this might generate a trap exception */ - gen_update_nip(ctx, ctx->nip - 4); gen_helper_tw(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free_i32(t1); @@ -3389,8 +3385,6 @@ static void gen_twi(DisasContext *ctx) static void gen_td(DisasContext *ctx) { TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); - /* Update the nip since this might generate a trap exception */ - gen_update_nip(ctx, ctx->nip - 4); gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], t0); tcg_temp_free_i32(t0); @@ -3401,8 +3395,6 @@ static void gen_tdi(DisasContext *ctx) { TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); - /* Update the nip since this might generate a trap exception */ - gen_update_nip(ctx, ctx->nip - 4); gen_helper_td(cpu_env, cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free_i32(t1);
This is no longer necessary as the helpers will properly retrieve the return address when needed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> --- target-ppc/excp_helper.c | 6 ++++-- target-ppc/translate.c | 8 -------- 2 files changed, 4 insertions(+), 10 deletions(-)