From patchwork Wed Jul 20 11:29:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 650647 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rvZTb1vCtz9t17 for ; Wed, 20 Jul 2016 21:30:27 +1000 (AEST) Received: from localhost ([::1]:33814 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPpho-0004eQ-JD for incoming@patchwork.ozlabs.org; Wed, 20 Jul 2016 07:30:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33020) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPpgf-0003hX-NO for qemu-devel@nongnu.org; Wed, 20 Jul 2016 07:29:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bPpgd-0000l9-2a for qemu-devel@nongnu.org; Wed, 20 Jul 2016 07:29:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39262) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPpgc-0000l3-TT for qemu-devel@nongnu.org; Wed, 20 Jul 2016 07:29:11 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8A8D9C05AA48 for ; Wed, 20 Jul 2016 11:29:10 +0000 (UTC) Received: from nilsson.home.kraxel.org (ovpn-116-37.ams2.redhat.com [10.36.116.37]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u6KBT9cR007998; Wed, 20 Jul 2016 07:29:10 -0400 Received: by nilsson.home.kraxel.org (Postfix, from userid 500) id 582F780FD6; Wed, 20 Jul 2016 13:29:09 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Wed, 20 Jul 2016 13:29:06 +0200 Message-Id: <1469014146-19368-2-git-send-email-kraxel@redhat.com> In-Reply-To: <1469014146-19368-1-git-send-email-kraxel@redhat.com> References: <1469014146-19368-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 20 Jul 2016 11:29:10 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 1/1] qxl: fix qxl_set_dirty call in qxl_dirty_one_surface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" qxl_set_dirty() expects start and end as range specification. qxl_dirty_one_surface passes 'size' instead of 'offset + size' as end parameter. Fix that. Also use uint64_t everywhere while being at it. Bug was added by "e25139b qxl: set only off-screen surfaces dirty instead of the whole vram" and carried forward unnoticed by "5cdc402 qxl: fix surface migration". Reported-by: Dr. David Alan Gilbert Signed-off-by: Gerd Hoffmann Reviewed-by: Dr. David Alan Gilbert Message-id: 1468413187-22071-1-git-send-email-kraxel@redhat.com --- hw/display/qxl.c | 11 ++++++----- hw/display/trace-events | 2 +- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 46cc866..0e2682d 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1816,16 +1816,17 @@ static void qxl_hw_update(void *opaque) static void qxl_dirty_one_surface(PCIQXLDevice *qxl, QXLPHYSICAL pqxl, uint32_t height, int32_t stride) { - uint64_t offset; - uint32_t slot, size; + uint64_t offset, size; + uint32_t slot; bool rc; rc = qxl_get_check_slot_offset(qxl, pqxl, &slot, &offset); assert(rc == true); - size = height * abs(stride); - trace_qxl_surfaces_dirty(qxl->id, (int)offset, size); + size = (uint64_t)height * abs(stride); + trace_qxl_surfaces_dirty(qxl->id, offset, size); qxl_set_dirty(qxl->guest_slots[slot].mr, - qxl->guest_slots[slot].offset + offset, size); + qxl->guest_slots[slot].offset + offset, + qxl->guest_slots[slot].offset + offset + size); } static void qxl_dirty_surfaces(PCIQXLDevice *qxl) diff --git a/hw/display/trace-events b/hw/display/trace-events index 9dd82ce..78f0465 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -105,7 +105,7 @@ qxl_spice_reset_image_cache(int qid) "%d" qxl_spice_reset_memslots(int qid) "%d" qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]" qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d" -qxl_surfaces_dirty(int qid, int offset, int size) "%d offset=%d size=%d" +qxl_surfaces_dirty(int qid, uint64_t offset, uint64_t size) "%d offset=0x%"PRIx64" size=0x%"PRIx64 qxl_send_events(int qid, uint32_t events) "%d %d" qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d" qxl_set_guest_bug(int qid) "%d"