| Message ID | 1468513783-25449-1-git-send-email-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 14 July 2016 at 17:29, Peter Maydell <peter.maydell@linaro.org> wrote: > target-arm patch queue. Some bugfixes, some minor features. > > thanks > -- PMM > > The following changes since commit 22e28174ae423629e57b0d03f4bbf2d1bedcd58f: > > Merge remote-tracking branch 'remotes/xtensa/tags/20160714-xtensa' into staging (2016-07-14 15:57:28 +0100) > > are available in the git repository at: > > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160714 > > for you to fetch changes up to 79a9f323a80b802ca98895d1c2d4aaf23cff815a: > > ast2400: externalize revision numbers (2016-07-14 16:51:39 +0100) > > ---------------------------------------------------------------- > target-arm queue: > * add virtio-mmio transport base address to device path > (avoid an assertion failure with multiple virtio-scsi-devices) > * revert hw/ptimer commit 5a50307 which causes regressions on > SPARC guests > * use Neon to accelerate zero-page checking on AArch64 hosts > * set the MPIDR for TCG to match how KVM does it (and fit with > GICv2/GICv3 restrictions on SGI target lists) > * add some missing AArch32 TLBI hypervisor TLB operations > * m25p80: Fix QIOR/DIOR handling for Winbond > * hw/misc: fix typo in Aspeed SCU hw-strap2 property name > * ast2400: pretend DMAs are done for U-boot > * ast2400: some minor code cleanups > Applied, thanks. -- PMM
target-arm patch queue. Some bugfixes, some minor features. thanks -- PMM The following changes since commit 22e28174ae423629e57b0d03f4bbf2d1bedcd58f: Merge remote-tracking branch 'remotes/xtensa/tags/20160714-xtensa' into staging (2016-07-14 15:57:28 +0100) are available in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20160714 for you to fetch changes up to 79a9f323a80b802ca98895d1c2d4aaf23cff815a: ast2400: externalize revision numbers (2016-07-14 16:51:39 +0100) ---------------------------------------------------------------- target-arm queue: * add virtio-mmio transport base address to device path (avoid an assertion failure with multiple virtio-scsi-devices) * revert hw/ptimer commit 5a50307 which causes regressions on SPARC guests * use Neon to accelerate zero-page checking on AArch64 hosts * set the MPIDR for TCG to match how KVM does it (and fit with GICv2/GICv3 restrictions on SGI target lists) * add some missing AArch32 TLBI hypervisor TLB operations * m25p80: Fix QIOR/DIOR handling for Winbond * hw/misc: fix typo in Aspeed SCU hw-strap2 property name * ast2400: pretend DMAs are done for U-boot * ast2400: some minor code cleanups ---------------------------------------------------------------- Andrew Jones (2): gic: provide defines for v2/v3 targetlist sizes hw/arm/virt: tcg: adjust MPIDR like KVM Cédric Le Goater (4): hw/misc: fix typo in Aspeed SCU hw-strap2 property name ast2400: replace aspeed_smc_is_implemented() ast2400: pretend DMAs are done for U-boot ast2400: externalize revision numbers Dmitry Osipenko (1): Revert "hw/ptimer: Perform counter wrap around if timer already expired" Laszlo Ersek (1): virtio-mmio: format transport base address in BusClass.get_dev_path Marcin Krzeminski (1): m25p80: Fix QIOR/DIOR handling for Winbond Sergey Sorokin (1): target-arm: Add missed AArch32 TLBI sytem registers Vijay (1): target-arm: Use Neon for zero checking hw/arm/ast2400.c | 2 - hw/arm/virt.c | 25 ++++++- hw/block/m25p80.c | 6 +- hw/core/ptimer.c | 9 +-- hw/misc/aspeed_scu.c | 6 +- hw/ssi/aspeed_smc.c | 39 +++++------ hw/virtio/virtio-mmio.c | 49 +++++++++++++ include/hw/compat.h | 6 +- include/hw/intc/arm_gic.h | 3 + include/hw/intc/arm_gicv3_common.h | 3 + include/hw/misc/aspeed_scu.h | 5 ++ target-arm/helper.c | 139 +++++++++++++++++++++++++++++++++++++ util/cutils.c | 7 ++ 13 files changed, 262 insertions(+), 37 deletions(-)