From patchwork Mon Jun 27 19:02:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 641200 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rddkl4bdJz9ssM for ; Tue, 28 Jun 2016 05:08:31 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=braap.org header.i=@braap.org header.b=xXyWgifQ; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b=sj3ejyNF; dkim-atps=neutral Received: from localhost ([::1]:60530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHbtV-0004y6-HN for incoming@patchwork.ozlabs.org; Mon, 27 Jun 2016 15:08:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59056) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHboG-0006n1-DA for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:03:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHboB-0008N5-5s for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:03:04 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:52736) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHbo8-0008CL-Rt for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:02:59 -0400 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.nyi.internal (Postfix) with ESMTP id 2E10720A4B; Mon, 27 Jun 2016 15:02:36 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute3.internal (MEProxy); Mon, 27 Jun 2016 15:02:36 -0400 DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-sasl-enc:x-sasl-enc; s=mesmtp; bh=szzEStOIBdzUaDqDeSJuQl01Md0 =; b=xXyWgifQ7YfucVU0bJ84E99D2ncViTEOyL8X8zA87YaqEIMQi4lpg11x+jr qVI0BxU3YJO/5/d0KlGxibw9jR+rD1Cs01TJb8wnERbclxNzRXyehrFwsJWugUh1 ag0n7LmqgJg0hw6wdGMmyf5aVibKy8qj0vwvB8xB2u9IbMp0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-sasl-enc:x-sasl-enc; s=smtpout; bh=szzE StOIBdzUaDqDeSJuQl01Md0=; b=sj3ejyNFlFwpgWNMLssBbHPWsxPDs9ONX2YD QRatkyz2kh3/3nFYAOuG4gw9ZRqAkhuRkXRhAvT5yVNlrtEHzCfH616YzOYAGy+T yHu4paazD6f9r/yggeynYcMGgmS+TTEp5z1qoSTMOPI2+6r5901eBk63I/SuNSiP CJHI4+M= X-Sasl-enc: 3KnPEfYqZReYpwS+PcMch500ZqxorJieOXmPFpnhcpDw 1467054155 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id D0F4BCC023; Mon, 27 Jun 2016 15:02:35 -0400 (EDT) From: "Emilio G. Cota" To: QEMU Developers , MTTCG Devel Date: Mon, 27 Jun 2016 15:02:10 -0400 Message-Id: <1467054136-10430-25-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1467054136-10430-1-git-send-email-cota@braap.org> References: <1467054136-10430-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.27 Subject: [Qemu-devel] [RFC 24/30] target-arm: emulate SWP with atomic_xchg helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Alvise Rigo , Sergey Fedorov , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Emilio G. Cota --- target-arm/translate.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 0d4a1a9..b177388 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8783,18 +8783,13 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) /* SWP instruction */ rm = (insn) & 0xf; - /* ??? This is not really atomic. However we know - we never have multiple CPUs running in parallel, - so it is good enough. */ addr = load_reg(s, rn); tmp = load_reg(s, rm); tmp2 = tcg_temp_new_i32(); if (insn & (1 << 22)) { - gen_aa32_ld8u(s, tmp2, addr, get_mem_index(s)); - gen_aa32_st8(s, tmp, addr, get_mem_index(s)); + gen_helper_atomic_xchgb(tmp2, cpu_env, addr, tmp); } else { - gen_aa32_ld32u(s, tmp2, addr, get_mem_index(s)); - gen_aa32_st32(s, tmp, addr, get_mem_index(s)); + gen_helper_atomic_xchgl(tmp2, cpu_env, addr, tmp); } tcg_temp_free_i32(tmp); tcg_temp_free_i32(addr);