From patchwork Mon Jun 27 14:44:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 641063 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rdX660ky8z9t1W for ; Tue, 28 Jun 2016 00:54:54 +1000 (AEST) Received: from localhost ([::1]:59129 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHXw3-0005qo-Rm for incoming@patchwork.ozlabs.org; Mon, 27 Jun 2016 10:54:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34781) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHXmy-0002vc-Ag for qemu-devel@nongnu.org; Mon, 27 Jun 2016 10:45:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHXmw-00089x-8B for qemu-devel@nongnu.org; Mon, 27 Jun 2016 10:45:27 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:57999) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHXmw-000844-0R for qemu-devel@nongnu.org; Mon, 27 Jun 2016 10:45:26 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1bHXml-0005SZ-7o for qemu-devel@nongnu.org; Mon, 27 Jun 2016 15:45:15 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 27 Jun 2016 15:44:59 +0100 Message-Id: <1467038710-24307-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1467038710-24307-1-git-send-email-peter.maydell@linaro.org> References: <1467038710-24307-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 07/18] ast2400: Integrate the SCU model and set silicon revision X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jeffery By specifying the silicon revision we select the appropriate reset values for the SoC. Additionally, expose hardware strapping properties aliasing those provided by the SCU for board-specific configuration. Signed-off-by: Andrew Jeffery Reviewed-by: Cédric Le Goater Reviewed-by: Peter Maydell Message-id: 1466744305-23163-3-git-send-email-andrew@aj.id.au Signed-off-by: Peter Maydell --- hw/arm/ast2400.c | 21 +++++++++++++++++++++ include/hw/arm/ast2400.h | 2 ++ 2 files changed, 23 insertions(+) diff --git a/hw/arm/ast2400.c b/hw/arm/ast2400.c index 4a9de0e..b14a82f 100644 --- a/hw/arm/ast2400.c +++ b/hw/arm/ast2400.c @@ -24,9 +24,12 @@ #define AST2400_IOMEM_SIZE 0x00200000 #define AST2400_IOMEM_BASE 0x1E600000 #define AST2400_VIC_BASE 0x1E6C0000 +#define AST2400_SCU_BASE 0x1E6E2000 #define AST2400_TIMER_BASE 0x1E782000 #define AST2400_I2C_BASE 0x1E78A000 +#define AST2400_A0_SILICON_REV 0x02000303 + static const int uart_irqs[] = { 9, 32, 33, 34, 10 }; static const int timer_irqs[] = { 16, 17, 18, 35, 36, 37, 38, 39, }; @@ -72,6 +75,16 @@ static void ast2400_init(Object *obj) object_initialize(&s->i2c, sizeof(s->i2c), TYPE_ASPEED_I2C); object_property_add_child(obj, "i2c", OBJECT(&s->i2c), NULL); qdev_set_parent_bus(DEVICE(&s->i2c), sysbus_get_default()); + + object_initialize(&s->scu, sizeof(s->scu), TYPE_ASPEED_SCU); + object_property_add_child(obj, "scu", OBJECT(&s->scu), NULL); + qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default()); + qdev_prop_set_uint32(DEVICE(&s->scu), "silicon-rev", + AST2400_A0_SILICON_REV); + object_property_add_alias(obj, "hw-strap1", OBJECT(&s->scu), + "hw-strap1", &error_abort); + object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu), + "hw-strap2", &error_abort); } static void ast2400_realize(DeviceState *dev, Error **errp) @@ -110,6 +123,14 @@ static void ast2400_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq); } + /* SCU */ + object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, AST2400_SCU_BASE); + /* UART - attach an 8250 to the IO space as our UART5 */ if (serial_hds[0]) { qemu_irq uart5 = qdev_get_gpio_in(DEVICE(&s->vic), uart_irqs[4]); diff --git a/include/hw/arm/ast2400.h b/include/hw/arm/ast2400.h index c05ed53..f1a64fd 100644 --- a/include/hw/arm/ast2400.h +++ b/include/hw/arm/ast2400.h @@ -14,6 +14,7 @@ #include "hw/arm/arm.h" #include "hw/intc/aspeed_vic.h" +#include "hw/misc/aspeed_scu.h" #include "hw/timer/aspeed_timer.h" #include "hw/i2c/aspeed_i2c.h" @@ -27,6 +28,7 @@ typedef struct AST2400State { AspeedVICState vic; AspeedTimerCtrlState timerctrl; AspeedI2CState i2c; + AspeedSCUState scu; } AST2400State; #define TYPE_AST2400 "ast2400"