| Message ID | 1466744305-23163-4-git-send-email-andrew@aj.id.au |
|---|---|
| State | New |
| Headers | show |
On 06/24/2016 06:58 AM, Andrew Jeffery wrote: > The magic constant configures the following options: > > * 28:27: Configure DRAM size as 256MB > * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 > * 23: Configure 24/48MHz CLKIN > * 22: Disable GPIOE pass-through mode > * 21: Disable GPIOD pass-through mode > * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses > * 19: Disable ACPI > * 18: Configure 48MHz CLKIN > * 17: Disable BMC 2nd boot watchdog timer > * 16: Decode SuperIO address 0x2E > * 15: VGA Class Code > * 14: Enable LPC dedicated reset pin > * 13:12: Enable SPI Master and SPI Slave to AHB Bridge > * 11:10: Select CPU:AHB ratio = 2:1 > * 9:8: Select 384MHz H-PLL > * 7: Configure MAC#2 for RMII/NCSI > * 6: Configure MAC#1 for RMII/NCSI > * 5: No VGA BIOS ROM > * 4: Boot using 32bit SPI address mode > * 3:2: Select 16MB VGA memory > * 1:0: Boot from SPI flash memory As the previous patchset was not setting the silicon version, we did not see that should be skipping the SPI Flash checks in U-Boot. So, with this little change : - object_property_set_int(OBJECT(&bmc->soc), 0x120CE416, "hw-strap1", + object_property_set_int(OBJECT(&bmc->soc), 0x120CE414, "hw-strap1", We reach a point where U-Boot is ready to load a kernel : U-Boot 2013.07 (Jun 07 2016 - 01:33:14) I2C: ready DRAM: 256 MiB WARNING: Caches not enabled Flash: SPI Flash ID: 19ba20 32 MiB In: serial Out: serial Err: serial H/W: AST2400 series chip Rev. 00 Watchdog: 300s Net: aspeednic#0 Warning: aspeednic#0 (eth0) using random MAC address - aa:36:26:50:30:9c Hit any key to stop autoboot: 0 boot# I will see if it is worth adding what is required in the SMC controller to support this. Else, we have the quick solution above. Tested-by: Cédric Le Goater <clg@kaod.org> Thanks, C. > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > Reviewed-by: Cédric Le Goater <clg@kaod.org> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > --- > hw/arm/palmetto-bmc.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/arm/palmetto-bmc.c b/hw/arm/palmetto-bmc.c > index a51d960510ee..b8eed21348d8 100644 > --- a/hw/arm/palmetto-bmc.c > +++ b/hw/arm/palmetto-bmc.c > @@ -44,6 +44,8 @@ static void palmetto_bmc_init(MachineState *machine) > &bmc->ram); > object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), > &error_abort); > + object_property_set_int(OBJECT(&bmc->soc), 0x120CE416, "hw-strap1", > + &error_abort); > object_property_set_bool(OBJECT(&bmc->soc), true, "realized", > &error_abort); > >
diff --git a/hw/arm/palmetto-bmc.c b/hw/arm/palmetto-bmc.c index a51d960510ee..b8eed21348d8 100644 --- a/hw/arm/palmetto-bmc.c +++ b/hw/arm/palmetto-bmc.c @@ -44,6 +44,8 @@ static void palmetto_bmc_init(MachineState *machine) &bmc->ram); object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), &error_abort); + object_property_set_int(OBJECT(&bmc->soc), 0x120CE416, "hw-strap1", + &error_abort); object_property_set_bool(OBJECT(&bmc->soc), true, "realized", &error_abort);