From patchwork Wed Jun 22 12:07:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 639139 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rZNgD5Wkjz9sDX for ; Wed, 22 Jun 2016 22:09:12 +1000 (AEST) Received: from localhost ([::1]:57770 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFgxy-0006fj-BQ for incoming@patchwork.ozlabs.org; Wed, 22 Jun 2016 08:09:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45014) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFgwZ-0004oc-Uh for qemu-devel@nongnu.org; Wed, 22 Jun 2016 08:07:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFgwS-0006Lw-Qp for qemu-devel@nongnu.org; Wed, 22 Jun 2016 08:07:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34777) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFgwS-0006Lm-Il for qemu-devel@nongnu.org; Wed, 22 Jun 2016 08:07:36 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 437A77EBBE; Wed, 22 Jun 2016 12:07:36 +0000 (UTC) Received: from nilsson.home.kraxel.org (ovpn-116-26.ams2.redhat.com [10.36.116.26]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u5MC7YHg016232; Wed, 22 Jun 2016 08:07:35 -0400 Received: by nilsson.home.kraxel.org (Postfix, from userid 500) id 92A42827AD; Wed, 22 Jun 2016 14:07:33 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Wed, 22 Jun 2016 14:07:24 +0200 Message-Id: <1466597244-5938-3-git-send-email-kraxel@redhat.com> In-Reply-To: <1466597244-5938-1-git-send-email-kraxel@redhat.com> References: <1466597244-5938-1-git-send-email-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 22 Jun 2016 12:07:36 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 3/3] qxl: fix surface migration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: spice-devel@lists.freedesktop.org, Gerd Hoffmann Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Create a helper function qxl_dirty_one_surface() to mark a single qxl surface as dirty. Use the new qxl_get_check_slot_offset function and lookup the memory region from the slot instead of assuming the surface is stored in vram. Use the new helper function in qxl_dirty_surfaces, for both primary and off-screen surfaces. For off-screen surfaces this is no functional change. For primary surfaces this will dirty only the memory actually used instead of the whole surface0 region. It will also work correctly in case the guest places the primary surface in vram instead of the surface0 region (linux kms driver does that). https://bugzilla.redhat.com/show_bug.cgi?id=1235732 Signed-off-by: Gerd Hoffmann --- hw/display/qxl.c | 37 +++++++++++++++++++++---------------- hw/display/trace-events | 2 +- 2 files changed, 22 insertions(+), 17 deletions(-) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 4909a7e..7da7b4e 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1808,9 +1808,23 @@ static void qxl_hw_update(void *opaque) qxl_render_update(qxl); } +static void qxl_dirty_one_surface(PCIQXLDevice *qxl, QXLPHYSICAL pqxl, + uint32_t height, int32_t stride) +{ + uint64_t offset; + uint32_t slot, size; + bool rc; + + rc = qxl_get_check_slot_offset(qxl, pqxl, &slot, &offset); + assert(rc == true); + size = height * abs(stride); + trace_qxl_surfaces_dirty(qxl->id, (int)offset, size); + qxl_set_dirty(qxl->guest_slots[slot].mr, + qxl->guest_slots[slot].offset + offset, size); +} + static void qxl_dirty_surfaces(PCIQXLDevice *qxl) { - uintptr_t vram_start; int i; if (qxl->mode != QXL_MODE_NATIVE && qxl->mode != QXL_MODE_COMPAT) { @@ -1818,16 +1832,13 @@ static void qxl_dirty_surfaces(PCIQXLDevice *qxl) } /* dirty the primary surface */ - qxl_set_dirty(&qxl->vga.vram, qxl->shadow_rom.draw_area_offset, - qxl->shadow_rom.surface0_area_size); - - vram_start = (uintptr_t)memory_region_get_ram_ptr(&qxl->vram_bar); + qxl_dirty_one_surface(qxl, qxl->guest_primary.surface.mem, + qxl->guest_primary.surface.height, + qxl->guest_primary.surface.stride); /* dirty the off-screen surfaces */ for (i = 0; i < qxl->ssd.num_surfaces; i++) { QXLSurfaceCmd *cmd; - intptr_t surface_offset; - int surface_size; if (qxl->guest_surfaces.cmds[i] == 0) { continue; @@ -1837,15 +1848,9 @@ static void qxl_dirty_surfaces(PCIQXLDevice *qxl) MEMSLOT_GROUP_GUEST); assert(cmd); assert(cmd->type == QXL_SURFACE_CMD_CREATE); - surface_offset = (intptr_t)qxl_phys2virt(qxl, - cmd->u.surface_create.data, - MEMSLOT_GROUP_GUEST); - assert(surface_offset); - surface_offset -= vram_start; - surface_size = cmd->u.surface_create.height * - abs(cmd->u.surface_create.stride); - trace_qxl_surfaces_dirty(qxl->id, i, (int)surface_offset, surface_size); - qxl_set_dirty(&qxl->vram_bar, surface_offset, surface_size); + qxl_dirty_one_surface(qxl, cmd->u.surface_create.data, + cmd->u.surface_create.height, + cmd->u.surface_create.stride); } } diff --git a/hw/display/trace-events b/hw/display/trace-events index 30bebff..9dd82ce 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -105,7 +105,7 @@ qxl_spice_reset_image_cache(int qid) "%d" qxl_spice_reset_memslots(int qid) "%d" qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]" qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d" -qxl_surfaces_dirty(int qid, int surface, int offset, int size) "%d surface=%d offset=%d size=%d" +qxl_surfaces_dirty(int qid, int offset, int size) "%d offset=%d size=%d" qxl_send_events(int qid, uint32_t events) "%d %d" qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d" qxl_set_guest_bug(int qid) "%d"