From patchwork Sat Jun 18 19:55:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Rolnik X-Patchwork-Id: 637564 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rX7Rs4PDjz9t2T for ; Sun, 19 Jun 2016 06:06:33 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=VasG28nx; dkim-atps=neutral Received: from localhost ([::1]:36262 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bEMVj-0001ek-Gn for incoming@patchwork.ozlabs.org; Sat, 18 Jun 2016 16:06:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45057) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bEMLv-00082K-IC for qemu-devel@nongnu.org; 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-typedef struct InstInfo InstInfo; - -/*This is the state at translation time. */ -struct DisasContext { - struct TranslationBlock *tb; - - /*Routine used to access memory */ - int memidx; - int bstate; - int singlestep; -}; - -enum { - BS_NONE = 0, /* Nothing special (none of the below */ - BS_STOP = 1, /* We want to stop translation for any reason */ - BS_BRANCH = 2, /* A branch condition is reached */ - BS_EXCP = 3, /* An exception condition is reached */ -}; - -static TCGv_env cpu_env; - -static TCGv cpu_pc; - -static TCGv cpu_Cf; -static TCGv cpu_Zf; -static TCGv cpu_Nf; -static TCGv cpu_Vf; -static TCGv cpu_Sf; -static TCGv cpu_Hf; -static TCGv cpu_Tf; -static TCGv cpu_If; - -static TCGv cpu_rampD; -static TCGv cpu_rampX; -static TCGv cpu_rampY; -static TCGv cpu_rampZ; - -static TCGv cpu_io[64]; -static TCGv cpu_r[32]; -static TCGv cpu_eind; -static TCGv cpu_sp; +#include "translate.h" + +TCGv_env cpu_env; + +TCGv cpu_pc; + +TCGv cpu_Cf; +TCGv cpu_Zf; +TCGv cpu_Nf; +TCGv cpu_Vf; +TCGv cpu_Sf; +TCGv cpu_Hf; +TCGv cpu_Tf; +TCGv cpu_If; + +TCGv cpu_rampD; +TCGv cpu_rampX; +TCGv cpu_rampY; +TCGv cpu_rampZ; + +TCGv cpu_io[64]; +TCGv cpu_r[32]; +TCGv cpu_eind; +TCGv cpu_sp; #include "exec/gen-icount.h" #define REG(x) (cpu_r[x]) @@ -120,25 +90,27 @@ void avr_translate_init(void) done_init = 1; } -static inline void gen_goto_tb(CPUAVRState *env, DisasContext *ctx, int n, - target_ulong dest) +static void decode_opc(AVRCPU *cpu, DisasContext *ctx, InstInfo *inst) { - TranslationBlock *tb; + CPUAVRState *env = &cpu->env; - tb = ctx->tb; + inst->opcode = cpu_ldl_code(env, inst->cpc * 2);/* pc points to words */ + inst->length = 16; + inst->translate = NULL; - if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) - && (ctx->singlestep == 0)) { - tcg_gen_goto_tb(n); - tcg_gen_movi_i32(cpu_pc, dest); - tcg_gen_exit_tb((uintptr_t)tb + n); - } else { - tcg_gen_movi_i32(cpu_pc, dest); + /* the following function looks onto the opcode as a string of bytes */ + avr_decode(inst->cpc, &inst->length, inst->opcode, &inst->translate); - if (ctx->singlestep) { - gen_helper_debug(cpu_env); - } - tcg_gen_exit_tb(0); + if (inst->length == 16) { + inst->npc = inst->cpc + 1; + /* get opcode as 16bit value */ + inst->opcode = inst->opcode & 0x0000ffff; + } + if (inst->length == 32) { + inst->npc = inst->cpc + 2; + /* get opcode as 32bit value */ + inst->opcode = (inst->opcode << 16) + | (inst->opcode >> 16); } } @@ -172,18 +144,21 @@ void gen_intermediate_code(CPUAVRState *env, struct TranslationBlock *tb) gen_tb_start(tb); /* decode first instruction */ - cpc = pc_start; - npc = cpc + 1; + ctx.inst[0].cpc = pc_start; + decode_opc(cpu, &ctx, &ctx.inst[0]); do { - /* translate current instruction */ + /* set curr/next PCs */ + cpc = ctx.inst[0].cpc; + npc = ctx.inst[0].npc; + + /* decode next instruction */ + ctx.inst[1].cpc = ctx.inst[0].npc; + decode_opc(cpu, &ctx, &ctx.inst[1]); + + /* translate current instruction */ tcg_gen_insn_start(cpc); num_insns++; - /* just skip to next instruction */ - cpc++; - npc++; - ctx.bstate = BS_NONE; - if (unlikely(cpu_breakpoint_test(cs, cpc * 2, BP_ANY))) { tcg_gen_movi_i32(cpu_pc, cpc); gen_helper_debug(cpu_env); @@ -195,6 +170,8 @@ void gen_intermediate_code(CPUAVRState *env, struct TranslationBlock *tb) goto done_generating; } + ctx.bstate = ctx.inst[0].translate(env, &ctx, ctx.inst[0].opcode); + if (num_insns >= max_insns) { break; /* max translated instructions limit reached */ } @@ -204,6 +181,8 @@ void gen_intermediate_code(CPUAVRState *env, struct TranslationBlock *tb) if ((cpc & (TARGET_PAGE_SIZE - 1)) == 0) { break; /* page boundary */ } + + ctx.inst[0] = ctx.inst[1]; /* make next inst curr */ } while (ctx.bstate == BS_NONE && !tcg_op_buf_full()); if (tb->cflags & CF_LAST_IO) { @@ -238,13 +217,13 @@ done_generating: } void restore_state_to_opc(CPUAVRState *env, TranslationBlock *tb, - target_ulong *data) + target_ulong *data) { env->pc_w = data[0]; } void avr_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) + int flags) { AVRCPU *cpu = AVR_CPU(cs); CPUAVRState *env = &cpu->env;