From patchwork Fri Jun 17 14:25:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 637118 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rWNqM6L3kz9sxR for ; Sat, 18 Jun 2016 01:05:51 +1000 (AEST) Received: from localhost ([::1]:58224 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDvLB-0005gA-ED for incoming@patchwork.ozlabs.org; Fri, 17 Jun 2016 11:05:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49848) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDuic-0005oX-Kx for qemu-devel@nongnu.org; Fri, 17 Jun 2016 10:25:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bDuia-0002pp-CF for qemu-devel@nongnu.org; Fri, 17 Jun 2016 10:25:57 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:57884) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDuia-0002oc-4v for qemu-devel@nongnu.org; Fri, 17 Jun 2016 10:25:56 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1bDuiY-00086Y-S4 for qemu-devel@nongnu.org; Fri, 17 Jun 2016 15:25:54 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 17 Jun 2016 15:25:33 +0100 Message-Id: <1466173552-25482-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1466173552-25482-1-git-send-email-peter.maydell@linaro.org> References: <1466173552-25482-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/22] target-arm: Define new arm_is_el3_or_mon() function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The GICv3 system registers need to know if the CPU is AArch64 in EL3 or AArch32 in Monitor mode. This happens to be the first part of the check for arm_is_secure(), so factor it out into a new arm_is_el3_or_mon() function that the GIC can also use. Signed-off-by: Peter Maydell Reviewed-by: Shannon Zhao Tested-by: Shannon Zhao Message-id: 1465915112-29272-4-git-send-email-peter.maydell@linaro.org --- target-arm/cpu.h | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 942aa36..325b737 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1146,8 +1146,8 @@ static inline bool arm_is_secure_below_el3(CPUARMState *env) } } -/* Return true if the processor is in secure state */ -static inline bool arm_is_secure(CPUARMState *env) +/* Return true if the CPU is AArch64 EL3 or AArch32 Mon */ +static inline bool arm_is_el3_or_mon(CPUARMState *env) { if (arm_feature(env, ARM_FEATURE_EL3)) { if (is_a64(env) && extract32(env->pstate, 2, 2) == 3) { @@ -1159,6 +1159,15 @@ static inline bool arm_is_secure(CPUARMState *env) return true; } } + return false; +} + +/* Return true if the processor is in secure state */ +static inline bool arm_is_secure(CPUARMState *env) +{ + if (arm_is_el3_or_mon(env)) { + return true; + } return arm_is_secure_below_el3(env); }