From patchwork Fri Jun 17 06:36:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 636810 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rW9ps59pJz9t21 for ; Fri, 17 Jun 2016 16:49:41 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b=RKlDdHx4; dkim-atps=neutral Received: from localhost ([::1]:54274 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDnb1-0003rD-DB for incoming@patchwork.ozlabs.org; Fri, 17 Jun 2016 02:49:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50375) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDnN2-0005b8-R4 for qemu-devel@nongnu.org; Fri, 17 Jun 2016 02:35:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bDnMy-0008Fl-U3 for qemu-devel@nongnu.org; Fri, 17 Jun 2016 02:35:11 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:41134) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDnMy-0008CX-Ak; Fri, 17 Jun 2016 02:35:08 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3rW9Tt5BK4z9t2B; Fri, 17 Jun 2016 16:34:58 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1466145298; bh=vyFQLHIKv0bGQp9jy5sJYHd5l02jCeuwuyT9EIKOn5w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RKlDdHx4UuK/JgpwxjvELzhMZs3XZnGqBHsFPAFTs/dSY+WkLxPDIcvdPpKO9Xw7d Dd0Qkze87SXLVEA6/xRCpFokhIBvZTIueMiRGk/vM8WfXjhIngY64q2GwZfnr9a2Oc /Amw+N+r5R/3AJ0PYlWJHq9kb73eJ79oLt4up+jA= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 17 Jun 2016 16:36:32 +1000 Message-Id: <1466145399-32209-12-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1466145399-32209-1-git-send-email-david@gibson.dropbear.id.au> References: <1466145399-32209-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 11/18] spapr: Abstract CPU core device and type specific core devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, aik@ozlabs.ru, mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, bharata@linux.vnet.ibm.com, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Bharata B Rao Add sPAPR specific abastract CPU core device that is based on generic CPU core device. Use this as base type to create sPAPR CPU specific core devices. TODO: - Add core types for other remaining CPU types - Handle CPU model alias correctly Signed-off-by: Bharata B Rao Signed-off-by: David Gibson --- hw/ppc/Makefile.objs | 1 + hw/ppc/spapr.c | 3 +- hw/ppc/spapr_cpu_core.c | 160 ++++++++++++++++++++++++++++++++++++++++ include/hw/ppc/spapr.h | 1 + include/hw/ppc/spapr_cpu_core.h | 29 ++++++++ target-ppc/kvm.c | 28 +++++++ 6 files changed, 220 insertions(+), 2 deletions(-) create mode 100644 hw/ppc/spapr_cpu_core.c create mode 100644 include/hw/ppc/spapr_cpu_core.h diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index c1ffc77..5cc6608 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -4,6 +4,7 @@ obj-y += ppc.o ppc_booke.o obj-$(CONFIG_PSERIES) += spapr.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-$(CONFIG_PSERIES) += spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o +obj-$(CONFIG_PSERIES) += spapr_cpu_core.o ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy) obj-y += spapr_pci_vfio.o endif diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 9a4a803..48df0e4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1623,8 +1623,7 @@ static void spapr_boot_set(void *opaque, const char *boot_device, machine->boot_order = g_strdup(boot_device); } -static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, - Error **errp) +void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp) { CPUPPCState *env = &cpu->env; diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c new file mode 100644 index 0000000..719777a --- /dev/null +++ b/hw/ppc/spapr_cpu_core.c @@ -0,0 +1,160 @@ +/* + * sPAPR CPU core device, acts as container of CPU thread devices. + * + * Copyright (C) 2016 Bharata B Rao + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ +#include "hw/cpu/core.h" +#include "hw/ppc/spapr_cpu_core.h" +#include "target-ppc/cpu.h" +#include "hw/ppc/spapr.h" +#include "hw/boards.h" +#include "qapi/error.h" +#include +#include "target-ppc/kvm_ppc.h" + +static int spapr_cpu_core_realize_child(Object *child, void *opaque) +{ + Error **errp = opaque; + sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); + CPUState *cs = CPU(child); + PowerPCCPU *cpu = POWERPC_CPU(cs); + + object_property_set_bool(child, true, "realized", errp); + if (*errp) { + return 1; + } + + spapr_cpu_init(spapr, cpu, errp); + if (*errp) { + return 1; + } + return 0; +} + +static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) +{ + sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev)); + CPUCore *cc = CPU_CORE(OBJECT(dev)); + const char *typename = object_class_get_name(sc->cpu_class); + size_t size = object_type_get_instance_size(typename); + Error *local_err = NULL; + Object *obj; + int i; + + sc->threads = g_malloc0(size * cc->nr_threads); + for (i = 0; i < cc->nr_threads; i++) { + char id[32]; + void *obj = sc->threads + i * size; + + object_initialize(obj, size, typename); + snprintf(id, sizeof(id), "thread[%d]", i); + object_property_add_child(OBJECT(sc), id, obj, &local_err); + if (local_err) { + goto err; + } + } + object_child_foreach(OBJECT(dev), spapr_cpu_core_realize_child, &local_err); + if (local_err) { + goto err; + } else { + return; + } + +err: + while (i >= 0) { + obj = sc->threads + i * size; + object_unparent(obj); + i--; + } + g_free(sc->threads); + error_propagate(errp, local_err); +} + +static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + dc->realize = spapr_cpu_core_realize; +} + +/* + * instance_init routines from different flavours of sPAPR CPU cores. + * TODO: Add support for 'host' core type. + */ +#define SPAPR_CPU_CORE_INITFN(_type, _fname) \ +static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \ +{ \ + sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \ + char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \ + ObjectClass *oc = object_class_by_name(name); \ + g_assert(oc); \ + g_free((void *)name); \ + core->cpu_class = oc; \ +} + +SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7); +SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus); +SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8); +SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E); + +typedef struct SPAPRCoreInfo { + const char *name; + void (*initfn)(Object *obj); +} SPAPRCoreInfo; + +static const SPAPRCoreInfo spapr_cores[] = { + /* POWER7 and aliases */ + { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn }, + { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn }, + + /* POWER7+ and aliases */ + { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn }, + { .name = "POWER7+", .initfn = spapr_cpu_core_POWER7plus_initfn }, + + /* POWER8 and aliases */ + { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn }, + { .name = "POWER8", .initfn = spapr_cpu_core_POWER8_initfn }, + { .name = "power8", .initfn = spapr_cpu_core_POWER8_initfn }, + + /* POWER8E and aliases */ + { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn }, + { .name = "POWER8E", .initfn = spapr_cpu_core_POWER8E_initfn }, + + { .name = NULL } +}; + +static void spapr_cpu_core_register(const SPAPRCoreInfo *info) +{ + TypeInfo type_info = { + .parent = TYPE_SPAPR_CPU_CORE, + .instance_size = sizeof(sPAPRCPUCore), + .instance_init = info->initfn, + }; + + type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name); + type_register(&type_info); + g_free((void *)type_info.name); +} + +static const TypeInfo spapr_cpu_core_type_info = { + .name = TYPE_SPAPR_CPU_CORE, + .parent = TYPE_CPU_CORE, + .abstract = true, + .instance_size = sizeof(sPAPRCPUCore), + .class_init = spapr_cpu_core_class_init, +}; + +static void spapr_cpu_core_register_types(void) +{ + const SPAPRCoreInfo *info = spapr_cores; + + type_register_static(&spapr_cpu_core_type_info); + while (info->name) { + spapr_cpu_core_register(info); + info++; + } +} + +type_init(spapr_cpu_core_register_types) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 3ac85c0..f597cc2 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -582,6 +582,7 @@ void spapr_hotplug_req_add_by_count(sPAPRDRConnectorType drc_type, uint32_t count); void spapr_hotplug_req_remove_by_count(sPAPRDRConnectorType drc_type, uint32_t count); +void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp); /* rtas-configure-connector state */ struct sPAPRConfigureConnectorState { diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h new file mode 100644 index 0000000..424edec --- /dev/null +++ b/include/hw/ppc/spapr_cpu_core.h @@ -0,0 +1,29 @@ +/* + * sPAPR CPU core device. + * + * Copyright (C) 2016 Bharata B Rao + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ +#ifndef HW_SPAPR_CPU_CORE_H +#define HW_SPAPR_CPU_CORE_H + +#include "hw/qdev.h" +#include "hw/cpu/core.h" +#include "target-ppc/cpu-qom.h" + +#define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" +#define SPAPR_CPU_CORE(obj) \ + OBJECT_CHECK(sPAPRCPUCore, (obj), TYPE_SPAPR_CPU_CORE) + +typedef struct sPAPRCPUCore { + /*< private >*/ + CPUCore parent_obj; + + /*< public >*/ + void *threads; + ObjectClass *cpu_class; +} sPAPRCPUCore; + +#endif diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index 1620864..e14da60 100644 --- a/target-ppc/kvm.c +++ b/target-ppc/kvm.c @@ -42,6 +42,9 @@ #include "exec/memattrs.h" #include "sysemu/hostmem.h" #include "qemu/cutils.h" +#if defined(TARGET_PPC64) +#include "hw/ppc/spapr_cpu_core.h" +#endif //#define DEBUG_KVM @@ -2341,6 +2344,19 @@ PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) return pvr_pcc; } +#if defined(TARGET_PPC64) +static void spapr_cpu_core_host_initfn(Object *obj) +{ + sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); + char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, "host"); + ObjectClass *oc = object_class_by_name(name); + + g_assert(oc); + g_free((void *)name); + core->cpu_class = oc; +} +#endif + static int kvm_ppc_register_host_cpu_type(void) { TypeInfo type_info = { @@ -2358,6 +2374,18 @@ static int kvm_ppc_register_host_cpu_type(void) type_info.parent = object_class_get_name(OBJECT_CLASS(pvr_pcc)); type_register(&type_info); +#if defined(TARGET_PPC64) + type_info.name = g_strdup_printf("%s-"TYPE_SPAPR_CPU_CORE, "host"); + type_info.parent = TYPE_SPAPR_CPU_CORE, + type_info.instance_size = sizeof(sPAPRCPUCore), + type_info.instance_init = spapr_cpu_core_host_initfn, + type_info.class_init = NULL; + type_register(&type_info); + g_free((void *)type_info.name); + type_info.instance_size = 0; + type_info.instance_init = NULL; +#endif + /* Register generic family CPU class for a family */ pvr_pcc = ppc_cpu_get_family_class(pvr_pcc); dc = DEVICE_CLASS(pvr_pcc);