From patchwork Mon Jun 13 13:09:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 634631 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rStZq6H8nz9t0q for ; Mon, 13 Jun 2016 23:16:19 +1000 (AEST) Received: from localhost ([::1]:56427 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCRiv-0004qd-Ft for incoming@patchwork.ozlabs.org; Mon, 13 Jun 2016 09:16:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48253) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCRdF-0007q0-Dn for qemu-devel@nongnu.org; Mon, 13 Jun 2016 09:10:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCRd9-0008LN-NL for qemu-devel@nongnu.org; Mon, 13 Jun 2016 09:10:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37571) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCRd9-0008LF-H3 for qemu-devel@nongnu.org; Mon, 13 Jun 2016 09:10:15 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2EA36A70A; Mon, 13 Jun 2016 13:10:15 +0000 (UTC) Received: from pxdev.xzpeter.org (vpn1-6-63.pek2.redhat.com [10.72.6.63]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u5DD9iRH025046; Mon, 13 Jun 2016 09:10:09 -0400 From: Peter Xu To: qemu-devel@nongnu.org Date: Mon, 13 Jun 2016 21:09:20 +0800 Message-Id: <1465823381-23602-5-git-send-email-peterx@redhat.com> In-Reply-To: <1465823381-23602-1-git-send-email-peterx@redhat.com> References: <1465823381-23602-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 13 Jun 2016 13:10:15 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v9 04/25] x86-iommu: introduce "intremap" property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, rkrcmar@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, pbonzini@redhat.com, marcel@redhat.com, imammedo@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Adding one property for intel-iommu devices to specify whether we should support interrupt remapping. By default, IR is disabled. To enable it, we should use (take Intel IOMMU as example): -device intel_iommu,intremap=on This property can be shared by Intel and future AMD IOMMUs. Signed-off-by: Peter Xu --- hw/i386/x86-iommu.c | 23 +++++++++++++++++++++++ include/hw/i386/x86-iommu.h | 1 + 2 files changed, 24 insertions(+) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 2d6d221..ddebb6d 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -52,9 +52,32 @@ static void x86_iommu_class_init(ObjectClass *klass, void *data) dc->realize = x86_iommu_realize; } +static bool x86_iommu_intremap_prop_get(Object *o, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + return s->intr_supported; +} + +static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + s->intr_supported = value; +} + +static void x86_iommu_instance_init(Object *o) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + + /* By default, do not support IR */ + s->intr_supported = false; + object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get, + x86_iommu_intremap_prop_set, NULL); +} + static const TypeInfo x86_iommu_info = { .name = TYPE_X86_IOMMU_DEVICE, .parent = TYPE_SYS_BUS_DEVICE, + .instance_init = x86_iommu_instance_init, .instance_size = sizeof(X86IOMMUState), .class_init = x86_iommu_class_init, .class_size = sizeof(X86IOMMUClass), diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 2070cd1..07199be 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -47,6 +47,7 @@ struct X86IOMMUClass { struct X86IOMMUState { SysBusDevice busdev; + bool intr_supported; /* Whether vIOMMU supports IR */ }; /**