From patchwork Wed Jun 8 21:11:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Rolnik X-Patchwork-Id: 632511 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rQ1W12BWqz9sXR for ; Thu, 9 Jun 2016 07:18:05 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=eMuWoJQC; dkim-atps=neutral Received: from localhost ([::1]:59552 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAkrT-0008S1-8t for incoming@patchwork.ozlabs.org; Wed, 08 Jun 2016 17:18:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48509) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAklV-0002wt-S6 for qemu-devel@nongnu.org; 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cc->do_interrupt(cs); - cs->interrupt_request &= ~CPU_INTERRUPT_RESET; + cs->interrupt_request &= ~CPU_INTERRUPT_RESET; ret = true; } } if (interrupt_request & CPU_INTERRUPT_HARD) { if (cpu_interrupts_enabled(env) && env->intsrc != 0) { - int index = ctz32(env->intsrc); + int index = ctz32(env->intsrc); cs->exception_index = EXCP_INT(index); cc->do_interrupt(cs); @@ -64,8 +64,8 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) void avr_cpu_do_interrupt(CPUState *cs) { - AVRCPU *cpu = AVR_CPU(cs); - CPUAVRState *env = &cpu->env; + AVRCPU *cpu = AVR_CPU(cs); + CPUAVRState *env = &cpu->env; uint32_t ret = env->pc_w; int vector = 0; @@ -79,14 +79,14 @@ void avr_cpu_do_interrupt(CPUState *cs) } if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) { - stb_phys(cs->as, env->sp--, (ret & 0x0000ff)); - stb_phys(cs->as, env->sp--, (ret & 0x00ff00) >> 8); - stb_phys(cs->as, env->sp--, (ret & 0xff0000) >> 16); + cpu_stb_data(env, env->sp--, (ret & 0x0000ff)); + cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8); + cpu_stb_data(env, env->sp--, (ret & 0xff0000) >> 16); } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) { - stb_phys(cs->as, env->sp--, (ret & 0x0000ff)); - stb_phys(cs->as, env->sp--, (ret & 0x00ff00) >> 8); + cpu_stb_data(env, env->sp--, (ret & 0x0000ff)); + cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8); } else { - stb_phys(cs->as, env->sp--, (ret & 0x0000ff)); + cpu_stb_data(env, env->sp--, (ret & 0x0000ff)); } env->pc_w = base + vector * size; @@ -133,6 +133,28 @@ void tlb_fill(CPUState *cs, target_ulong vaddr, int is_write, tlb_set_page_with_attrs(cs, vaddr, paddr, attrs, prot, mmu_idx, page_size); } +void helper_sleep(CPUAVRState *env) +{ + CPUState *cs = CPU(avr_env_get_cpu(env)); + + cs->exception_index = EXCP_HLT; + cpu_loop_exit(cs); +} +void helper_unsupported(CPUAVRState *env) +{ + CPUState *cs = CPU(avr_env_get_cpu(env)); + + /* + I count not find what happens on the real platform, so + it's EXCP_DEBUG for meanwhile + */ + cs->exception_index = EXCP_DEBUG; + if (qemu_loglevel_mask(LOG_UNIMP)) { + qemu_log("UNSUPPORTED\n"); + cpu_dump_state(cs, qemu_logfile, fprintf, 0); + } + cpu_loop_exit(cs); +} void helper_debug(CPUAVRState *env) { @@ -142,3 +164,106 @@ void helper_debug(CPUAVRState *env) cpu_loop_exit(cs); } +void helper_wdr(CPUAVRState *env) +{ + CPUState *cs = CPU(avr_env_get_cpu(env)); + + /* + WD is not implemented yet, placeholder + */ + cs->exception_index = EXCP_DEBUG; + cpu_loop_exit(cs); +} + +target_ulong helper_inb(CPUAVRState *env, uint32_t port) +{ + qemu_log("in: io[%02x]\n", port); + + switch (port) { + case 0x38: { + return 0xff & (env->rampD >> 16); /* RAMPD */ + } + case 0x39: { + return 0xff & (env->rampX >> 16); /* RAMPX */ + } + case 0x3a: { + return 0xff & (env->rampY >> 16); /* RAMPY */ + } + case 0x3b: { + return 0xff & (env->rampZ >> 16); /* RAMPZ */ + } + case 0x3c: { + return 0xff & (env->eind >> 16); /* EIND */ + } + case 0x3d: { /* SPL */ + return env->sp & 0x00ff; + } + case 0x3e: { /* SPH */ + return env->sp >> 8; + } + case 0x3f: { /* SREG */ + return cpu_get_sreg(env); + } + } + return 0; +} + +void helper_outb(CPUAVRState *env, uint32_t port, uint32_t data) +{ + qemu_log("out:%02x -> io[%02x]\n", data, port); + + data &= 0x000000ff; + + switch (port) { + case 0x04: { + qemu_irq irq; + CPUState *cpu = CPU(avr_env_get_cpu(env)); + irq = qdev_get_gpio_in(DEVICE(cpu), 3); + qemu_set_irq(irq, 1); + break; + } + case 0x38: { + if (avr_feature(env, AVR_FEATURE_RAMPD)) { + env->rampD = (data & 0xff) << 16; /* RAMPD */ + } + break; + } + case 0x39: { + if (avr_feature(env, AVR_FEATURE_RAMPX)) { + env->rampX = (data & 0xff) << 16; /* RAMPX */ + } + break; + } + case 0x3a: { + if (avr_feature(env, AVR_FEATURE_RAMPY)) { + env->rampY = (data & 0xff) << 16; /* RAMPY */ + } + break; + } + case 0x3b: { + if (avr_feature(env, AVR_FEATURE_RAMPZ)) { + env->rampZ = (data & 0xff) << 16; /* RAMPZ */ + } + break; + } + case 0x3c: { + env->eind = (data & 0xff) << 16; /* EIDN */ + break; + } + case 0x3d: { /* SPL */ + env->sp = (env->sp & 0xff00) | (data); + break; + } + case 0x3e: { /* SPH */ + if (avr_feature(env, AVR_FEATURE_2_BYTE_SP)) { + env->sp = (env->sp & 0x00ff) | (data << 8); + } + break; + } + case 0x3f: { /* SREG */ + cpu_set_sreg(env, data); + break; + } + } +} + diff --git a/target-avr/helper.h b/target-avr/helper.h index b5ef3bf..82f440a 100644 --- a/target-avr/helper.h +++ b/target-avr/helper.h @@ -18,4 +18,9 @@ * */ +DEF_HELPER_1(wdr, void, env) DEF_HELPER_1(debug, void, env) +DEF_HELPER_1(sleep, void, env) +DEF_HELPER_1(unsupported, void, env) +DEF_HELPER_3(outb, void, env, i32, i32) +DEF_HELPER_2(inb, tl, env, i32)