From patchwork Tue Jun 7 02:50:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 631288 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rNx7642dxz9t3h for ; Tue, 7 Jun 2016 12:57:06 +1000 (AEST) Received: from localhost ([::1]:46652 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bA7CS-0001fr-Iu for incoming@patchwork.ozlabs.org; Mon, 06 Jun 2016 22:57:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43965) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bA7BW-000119-VW for qemu-devel@nongnu.org; Mon, 06 Jun 2016 22:56:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bA7BS-0006KE-0N for qemu-devel@nongnu.org; Mon, 06 Jun 2016 22:56:05 -0400 Received: from gate.crashing.org ([63.228.1.57]:52471) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bA7BR-0006K5-Mu; Mon, 06 Jun 2016 22:56:01 -0400 Received: from pasglop.ozlabs.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id u572oXdS013752; Mon, 6 Jun 2016 21:50:45 -0500 From: Benjamin Herrenschmidt To: qemu-ppc@nongnu.org Date: Tue, 7 Jun 2016 12:50:24 +1000 Message-Id: <1465267828-10326-5-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1465267828-10326-1-git-send-email-benh@kernel.crashing.org> References: <1465267828-10326-1-git-send-email-benh@kernel.crashing.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 63.228.1.57 Subject: [Qemu-devel] [PATCH 5/9] ppc: POWER7 has lq/stq instructions and stq need to check ISA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cedric Le Goater , qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The PPC_64BX instruction flag is used for a couple of newer instructions currently on POWER8 but our implementation for them works for POWER7 too (and already does the proper checking of what is permitted) with one exception: stq needs to check the ISA version. This fixes the latter and add the instructions to POWER7 Signed-off-by: Benjamin Herrenschmidt --- target-ppc/translate.c | 5 ++++- target-ppc/translate_init.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index ab5862f..b34289f 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -3047,10 +3047,13 @@ static void gen_std(DisasContext *ctx) rs = rS(ctx->opcode); if ((ctx->opcode & 0x3) == 0x2) { /* stq */ - bool legal_in_user_mode = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; bool le_is_supported = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; + if (!(ctx->insns_flags & PPC_64BX)) { + gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); + } + if (!legal_in_user_mode && ctx->pr) { gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); return; diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index ad6f2f3..a1db500 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8377,7 +8377,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | - PPC_64B | PPC_64H | PPC_ALTIVEC | + PPC_64B | PPC_64H | PPC_64BX | PPC_ALTIVEC | PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD; pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |