From patchwork Wed May 4 20:12:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 618659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3r0V7C0l2Xz9sdg for ; Thu, 5 May 2016 06:31:19 +1000 (AEST) Received: from localhost ([::1]:50159 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ay3Rx-0001HP-Gi for incoming@patchwork.ozlabs.org; Wed, 04 May 2016 16:31:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47892) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ay3Db-0005EL-KH for qemu-devel@nongnu.org; Wed, 04 May 2016 16:16:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ay3DP-0004pq-Pm for qemu-devel@nongnu.org; Wed, 04 May 2016 16:16:18 -0400 Received: from smtp1-g21.free.fr ([2a01:e0c:1:1599::10]:22702) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ay3DP-0004dk-He for qemu-devel@nongnu.org; Wed, 04 May 2016 16:16:11 -0400 Received: from Quad.localdomain (unknown [IPv6:2a01:e34:eeee:5240:12c3:7bff:fe6b:9a76]) by smtp1-g21.free.fr (Postfix) with ESMTPS id 5F62FB003E4; Wed, 4 May 2016 20:09:39 +0200 (CEST) From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 4 May 2016 22:12:11 +0200 Message-Id: <1462392752-17703-32-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1462392752-17703-1-git-send-email-laurent@vivier.eu> References: <1462392752-17703-1-git-send-email-laurent@vivier.eu> X-detected-operating-system: by eggs.gnu.org: Windows NT kernel [generic] [fuzzy] X-Received-From: 2a01:e0c:1:1599::10 Subject: [Qemu-devel] [PATCH 31/52] target-m68k: some bit ops cleanup X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , rth@twiddle.net, schwab@linux-m68k.org, agraf@suse.de, gerg@uclinux.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index cd656fe..817f0b3 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1300,39 +1300,36 @@ DISAS_INSN(bitop_reg) else opsize = OS_LONG; op = (insn >> 6) & 3; - - gen_flush_flags(s); - SRC_EA(env, src1, opsize, 0, op ? &addr: NULL); - src2 = DREG(insn, 9); - dest = tcg_temp_new(); - tmp = tcg_temp_new(); + gen_flush_flags(s); + src2 = tcg_temp_new(); if (opsize == OS_BYTE) - tcg_gen_andi_i32(tmp, src2, 7); + tcg_gen_andi_i32(src2, DREG(insn, 9), 7); else - tcg_gen_andi_i32(tmp, src2, 31); + tcg_gen_andi_i32(src2, DREG(insn, 9), 31); - src2 = tcg_const_i32(1); - tcg_gen_shl_i32(src2, src2, tmp); - tcg_temp_free(tmp); + tmp = tcg_const_i32(1); + tcg_gen_shl_i32(tmp, tmp, src2); + tcg_temp_free(src2); - tcg_gen_and_i32(QREG_CC_Z, src1, src2); + tcg_gen_and_i32(QREG_CC_Z, src1, tmp); + dest = tcg_temp_new(); switch (op) { case 1: /* bchg */ - tcg_gen_xor_i32(dest, src1, src2); + tcg_gen_xor_i32(dest, src1, tmp); break; case 2: /* bclr */ - tcg_gen_andc_i32(dest, src1, src2); + tcg_gen_andc_i32(dest, src1, tmp); break; case 3: /* bset */ - tcg_gen_or_i32(dest, src1, src2); + tcg_gen_or_i32(dest, src1, tmp); break; default: /* btst */ break; } - tcg_temp_free(src2); + tcg_temp_free(tmp); if (op) { DEST_EA(env, insn, opsize, dest, &addr); } @@ -1416,17 +1413,16 @@ DISAS_INSN(bitop_im) return; } - gen_flush_flags(s); - SRC_EA(env, src1, opsize, 0, op ? &addr: NULL); + gen_flush_flags(s); if (opsize == OS_BYTE) bitnum &= 7; else bitnum &= 31; mask = 1 << bitnum; - tcg_gen_andi_i32(QREG_CC_Z, src1, mask); + tcg_gen_andi_i32(QREG_CC_Z, src1, mask); if (op) { tmp = tcg_temp_new();