From patchwork Mon Apr 4 16:43:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 605925 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qdyVl3QzWz9s3s for ; Tue, 5 Apr 2016 02:43:59 +1000 (AEST) Received: from localhost ([::1]:59944 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1an7bZ-0006CU-Ma for incoming@patchwork.ozlabs.org; Mon, 04 Apr 2016 12:43:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51790) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1an7b1-0004yv-MZ for qemu-devel@nongnu.org; Mon, 04 Apr 2016 12:43:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1an7b0-0002uR-Mw for qemu-devel@nongnu.org; Mon, 04 Apr 2016 12:43:23 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:56333) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1an7b0-0002t2-G8 for qemu-devel@nongnu.org; Mon, 04 Apr 2016 12:43:22 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1an7as-0003GE-4n for qemu-devel@nongnu.org; Mon, 04 Apr 2016 17:43:14 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 4 Apr 2016 17:43:08 +0100 Message-Id: <1459788192-26272-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1459788192-26272-1-git-send-email-peter.maydell@linaro.org> References: <1459788192-26272-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 1/5] hw/arm/bcm2836: Wire up CPU timer interrupts correctly X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Wire up the CPU timer interrupts in the right order, with the nonsecure physical timer on cntpnsirq, the hyp timer on cnthpirq, and the secure physical timer on cntpsirq. (We did get the virt timer right, at least.) Reported-by: Antonio Huete Jiménez Signed-off-by: Peter Maydell Reviewed-by: Andrew Baumann Message-id: 1458210790-6621-1-git-send-email-peter.maydell@linaro.org --- hw/arm/bcm2836.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c index af29dd1..8451190 100644 --- a/hw/arm/bcm2836.c +++ b/hw/arm/bcm2836.c @@ -139,9 +139,13 @@ static void bcm2836_realize(DeviceState *dev, Error **errp) /* Connect timers from the CPU to the interrupt controller */ qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_PHYS, - qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); + qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n)); qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_VIRT, qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n)); + qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_HYP, + qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n)); + qdev_connect_gpio_out(DEVICE(&s->cpus[n]), GTIMER_SEC, + qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n)); } }