From patchwork Mon Mar 21 18:42:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelio Remonda X-Patchwork-Id: 600263 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qTPp63xCRz9s3v for ; Tue, 22 Mar 2016 05:42:38 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=tallertechnologies.com header.i=@tallertechnologies.com header.b=b/QOgBcE; dkim-atps=neutral Received: from localhost ([::1]:59750 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai4mi-0002Kr-Oq for incoming@patchwork.ozlabs.org; Mon, 21 Mar 2016 14:42:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48041) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai4mR-00023S-Gm for qemu-devel@nongnu.org; Mon, 21 Mar 2016 14:42:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ai4mO-0005Dz-9U for qemu-devel@nongnu.org; Mon, 21 Mar 2016 14:42:19 -0400 Received: from mail-qg0-x22c.google.com ([2607:f8b0:400d:c04::22c]:36247) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai4mO-0005DW-2J for qemu-devel@nongnu.org; Mon, 21 Mar 2016 14:42:16 -0400 Received: by mail-qg0-x22c.google.com with SMTP id u110so159523596qge.3 for ; Mon, 21 Mar 2016 11:42:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tallertechnologies.com; s=google; h=from:to:subject:date:message-id; bh=nj0q15OXmXV7QlKYw/ZHrmkkXTFfDzA6ILsNJ763xYs=; b=b/QOgBcEQXc/4/t93fJqQdMxJ+8S+Wcyy2YZkVfdTwMFvF96bkj5ZMce8nQqcLYtP5 Gku7kYGZu6LAHqLOxHTht3nI4yKfGaVl+iFbWIuIpWTLWTggrxQlks2d3zEDnA9qGHz4 vgKipNILrIGtZBXswCfK9CBhjgNCE8Zf7qN8E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id; bh=nj0q15OXmXV7QlKYw/ZHrmkkXTFfDzA6ILsNJ763xYs=; b=GiY38Perq6ENuO8ZxkpJ49CRR6hUnOAYXbsh8EcJGq7YCPBGaYe69akDHx3lzAy1nQ Csdt0WUynd4/tJPvDNs8DQzchQL0tK9j5RnnBR81li2r2jfUdxJ6xrYhpkYhYxdqMfrK yb4qn3IcLJ1Rb4ANLaFwI8oMGyhErKL+2BFXkRekwzmEhMxIBh315t49b4Lx8ULcmATh QzqLXymsvT7uhxEnpIZwfmhEhoPkFBkn0k6lhNmxAXcy6Rju6wzsObfJP+fS6H5ovi0W 51DqEG02YP6kfYFrw+OtZcxG0Y3oBdyqDrB/v1djJh0YpPjpMCjaTiDZvOsAXIJZGHLP Db4Q== X-Gm-Message-State: AD7BkJLzwXOmV7yyliWUxDsA82x2jU/kzI/tsZQeHwIZcO4xSlAKuUMDpca1LQ20DuZab7KR X-Received: by 10.140.88.229 with SMTP id t92mr42172624qgd.8.1458585735371; Mon, 21 Mar 2016 11:42:15 -0700 (PDT) Received: from Remonda-PC.dominio.tallertechnologies.com ([200.69.202.173]) by smtp.gmail.com with ESMTPSA id l67sm12796310qgl.47.2016.03.21.11.42.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Mar 2016 11:42:14 -0700 (PDT) From: Aurelio Remonda To: aurelio.remonda@tallertechnologies.com, peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Mon, 21 Mar 2016 15:42:08 -0300 Message-Id: <1458585728-3197-1-git-send-email-aurelio.remonda@tallertechnologies.com> X-Mailer: git-send-email 2.7.3 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c04::22c Subject: [Qemu-devel] [PING][PATCH] Added the -m flag feature to stellaris boards X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch adds the memory flag to both stellaris LM3S811EVB and LM3S6965EVB. The hardcoded dc0 values for both boards still exists but now the higher 16 bits are calculated based on ram_size which could be either user-given or the default one. Then the sram_size is calculated as usual, flash_size is not affected by this. As the higher part of dc0 has a top value of 0xffff, the boards won't accept a size value larger than 16M. We'll throw an error if the user tries to make the RAM larger than that. The default RAM sizes are now set in the boards' respective class_init functions. I tested this on the LM3S6965evb doing a full system emulation. I couldn't try this on the LM3S811EVB since I am using RTEMS and it does not support that board. Signed-off-by: Aurelio Remonda --- hw/arm/stellaris.c | 38 +++++++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 11 deletions(-) -- 2.7.3 diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 0114e0a..dbbb1c8 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -17,6 +17,7 @@ #include "hw/boards.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" +#include "qemu/error-report.h" #define GPIO_A 0 #define GPIO_B 1 @@ -31,17 +32,21 @@ #define BP_GAMEPAD 0x04 #define NUM_IRQ_LINES 64 +#define LM3S811EVB_DEFAULT_DC0 0x00001f00 /* Default value for dc0 sram_size half */ +#define LM3S6965EVB_DEFAULT_DC0 0x0000ff00 /* Default value for dc0 sram_size half */ +#define DC0_MAX_SRAM 0xffff /* Maximum value for sram half in dc0 register */ +#define DC0_SRAM_SHIFT 16 -typedef const struct { +typedef struct { const char *name; - uint32_t did0; - uint32_t did1; + const uint32_t did0; + const uint32_t did1; uint32_t dc0; - uint32_t dc1; - uint32_t dc2; - uint32_t dc3; - uint32_t dc4; - uint32_t peripherals; + const uint32_t dc1; + const uint32_t dc2; + const uint32_t dc3; + const uint32_t dc4; + const uint32_t peripherals; } stellaris_board_info; /* General purpose timer module. */ @@ -1190,7 +1195,7 @@ static stellaris_board_info stellaris_boards[] = { { "LM3S811EVB", 0, 0x0032000e, - 0x001f001f, /* dc0 */ + 0x0000001f, /* dc0 */ 0x001132bf, 0x01071013, 0x3f0f01ff, @@ -1200,7 +1205,7 @@ static stellaris_board_info stellaris_boards[] = { { "LM3S6965EVB", 0x10010002, 0x1073402e, - 0x00ff007f, /* dc0 */ + 0x0000007f, /* dc0 */ 0x001133ff, 0x030f5317, 0x0f0f87ff, @@ -1223,7 +1228,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, qemu_irq gpio_in[7][8]; qemu_irq gpio_out[7][8]; qemu_irq adc; - int sram_size; + unsigned int sram_size; int flash_size; I2CBus *i2c; DeviceState *dev; @@ -1234,6 +1239,15 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, MemoryRegion *flash = g_new(MemoryRegion, 1); MemoryRegion *system_memory = get_system_memory(); + /* RAM size should be divided by 256 in order to get a valid 16 bits dc0 value */ + ram_size = (ram_size >> 8) - 1; + + if (ram_size > DC0_MAX_SRAM) { + error_report("Requested RAM size is too big for this board. The maximum allowed is 16M."); + exit(EXIT_FAILURE); + } + + board->dc0 |= ram_size << DC0_SRAM_SHIFT; flash_size = (((board->dc0 & 0xffff) + 1) << 1) * 1024; sram_size = ((board->dc0 >> 18) + 1) * 1024; @@ -1391,6 +1405,7 @@ static void lm3s811evb_class_init(ObjectClass *oc, void *data) mc->desc = "Stellaris LM3S811EVB"; mc->init = lm3s811evb_init; + mc->default_ram_size = LM3S811EVB_DEFAULT_DC0; } static const TypeInfo lm3s811evb_type = { @@ -1405,6 +1420,7 @@ static void lm3s6965evb_class_init(ObjectClass *oc, void *data) mc->desc = "Stellaris LM3S6965EVB"; mc->init = lm3s6965evb_init; + mc->default_ram_size = LM3S6965EVB_DEFAULT_DC0; } static const TypeInfo lm3s6965evb_type = {