From patchwork Mon Mar 7 19:25:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 593122 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9A8671402A0 for ; Tue, 8 Mar 2016 06:27:19 +1100 (AEDT) Received: from localhost ([::1]:57894 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ad0oH-0006O3-LO for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2016 14:27:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44517) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ad0n4-0003zZ-DD for qemu-devel@nongnu.org; Mon, 07 Mar 2016 14:26:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ad0n2-0003sv-DB for qemu-devel@nongnu.org; Mon, 07 Mar 2016 14:26:02 -0500 Received: from mx1.redhat.com ([209.132.183.28]:53953) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ad0n2-0003sW-75 for qemu-devel@nongnu.org; Mon, 07 Mar 2016 14:26:00 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (Postfix) with ESMTPS id D0C8F4C392; Mon, 7 Mar 2016 19:25:59 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-61.ams2.redhat.com [10.36.116.61]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u27JPwQf026165 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 7 Mar 2016 14:25:59 -0500 Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id ADBA03001847; Mon, 7 Mar 2016 20:25:55 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Mon, 7 Mar 2016 20:25:20 +0100 Message-Id: <1457378754-21649-9-git-send-email-armbru@redhat.com> In-Reply-To: <1457378754-21649-1-git-send-email-armbru@redhat.com> References: <1457378754-21649-1-git-send-email-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: claudio.fontana@huawei.com, cam@cs.ualberta.ca, mlureau@redhat.com, david.marchand@6wind.com, pbonzini@redhat.com Subject: [Qemu-devel] [PATCH v2 08/42] tests/libqos/pci-pc: Fix qpci_pc_iomap() to map BARs aligned X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org qpci_pc_iomap() maps BARs one after the other, without padding. This is wrong. PCI Local Bus Specification Revision 3.0, 6.2.5.1. Address Maps: "all address spaces used are a power of two in size and are naturally aligned". That's because the size of a BAR is given by the number of address bits the device decodes, and the BAR needs to be mapped at a multiple of that size to ensure the address decoding works. Fix qpci_pc_iomap() accordingly. This takes care of a FIXME in ivshmem-test. Signed-off-by: Markus Armbruster Reviewed-by: Marc-André Lureau --- tests/ivshmem-test.c | 17 ++++++++--------- tests/libqos/pci-pc.c | 8 ++++++-- 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/tests/ivshmem-test.c b/tests/ivshmem-test.c index 4efa433..da6ca0d 100644 --- a/tests/ivshmem-test.c +++ b/tests/ivshmem-test.c @@ -110,19 +110,18 @@ static void setup_vm_cmd(IVState *s, const char *cmd, bool msix) s->pcibus = qpci_init_pc(); s->dev = get_device(s->pcibus); - /* FIXME: other bar order fails, mappings changes */ - s->mem_base = qpci_iomap(s->dev, 2, &barsize); - g_assert_nonnull(s->mem_base); - g_assert_cmpuint(barsize, ==, TMPSHMSIZE); - - if (msix) { - qpci_msix_enable(s->dev); - } - s->reg_base = qpci_iomap(s->dev, 0, &barsize); g_assert_nonnull(s->reg_base); g_assert_cmpuint(barsize, ==, 256); + if (msix) { + qpci_msix_enable(s->dev); + } + + s->mem_base = qpci_iomap(s->dev, 2, &barsize); + g_assert_nonnull(s->mem_base); + g_assert_cmpuint(barsize, ==, TMPSHMSIZE); + qpci_device_enable(s->dev); } diff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c index 08167c0..77f15e5 100644 --- a/tests/libqos/pci-pc.c +++ b/tests/libqos/pci-pc.c @@ -184,7 +184,9 @@ static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *s if (io_type == PCI_BASE_ADDRESS_SPACE_IO) { uint16_t loc; - g_assert((s->pci_iohole_alloc + size) <= s->pci_iohole_size); + g_assert(QEMU_ALIGN_UP(s->pci_iohole_alloc, size) + size + <= s->pci_iohole_size); + s->pci_iohole_alloc = QEMU_ALIGN_UP(s->pci_iohole_alloc, size); loc = s->pci_iohole_start + s->pci_iohole_alloc; s->pci_iohole_alloc += size; @@ -194,7 +196,9 @@ static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *s } else { uint64_t loc; - g_assert((s->pci_hole_alloc + size) <= s->pci_hole_size); + g_assert(QEMU_ALIGN_UP(s->pci_hole_alloc, size) + size + <= s->pci_hole_size); + s->pci_hole_alloc = QEMU_ALIGN_UP(s->pci_hole_alloc, size); loc = s->pci_hole_start + s->pci_hole_alloc; s->pci_hole_alloc += size;