From patchwork Mon Mar 7 19:25:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 593134 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 70AAA1402D8 for ; Tue, 8 Mar 2016 06:32:37 +1100 (AEDT) Received: from localhost ([::1]:57951 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ad0tP-0007xE-EK for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2016 14:32:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ad0n7-00044L-FN for qemu-devel@nongnu.org; Mon, 07 Mar 2016 14:26:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ad0n5-0003x1-Dg for qemu-devel@nongnu.org; Mon, 07 Mar 2016 14:26:05 -0500 Received: from mx1.redhat.com ([209.132.183.28]:36260) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ad0n5-0003wE-8y for qemu-devel@nongnu.org; Mon, 07 Mar 2016 14:26:03 -0500 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id DA80A2DC371; Mon, 7 Mar 2016 19:26:02 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-116-61.ams2.redhat.com [10.36.116.61]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u27JQ05K005271 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 7 Mar 2016 14:26:02 -0500 Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id ACC883004FBA; Mon, 7 Mar 2016 20:25:56 +0100 (CET) From: Markus Armbruster To: qemu-devel@nongnu.org Date: Mon, 7 Mar 2016 20:25:34 +0100 Message-Id: <1457378754-21649-23-git-send-email-armbru@redhat.com> In-Reply-To: <1457378754-21649-1-git-send-email-armbru@redhat.com> References: <1457378754-21649-1-git-send-email-armbru@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: claudio.fontana@huawei.com, cam@cs.ualberta.ca, mlureau@redhat.com, david.marchand@6wind.com, pbonzini@redhat.com Subject: [Qemu-devel] [PATCH v2 22/42] ivshmem: Leave INTx alone when using MSI-X X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The ivshmem device can either use MSI-X or legacy INTx for interrupts. With MSI-X enabled, peer interrupt events trigger an MSI as they should. But software can still raise INTx via interrupt status and mask register in BAR 0. This is explicitly prohibited by PCI Local Bus Specification Revision 3.0, section 6.8.3.3: While enabled for MSI or MSI-X operation, a function is prohibited from using its INTx# pin (if implemented) to request service (MSI, MSI-X, and INTx# are mutually exclusive). Fix the device model to leave INTx alone when using MSI-X. Document that we claim to use INTx in config space even when we don't. Unlike other devices, ivshmem does *not* use INTx when configured for MSI-X and MSI-X isn't enabled by software. Signed-off-by: Markus Armbruster Reviewed-by: Marc-André Lureau --- hw/misc/ivshmem.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index cfea151..fc37feb 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -126,6 +126,11 @@ static void ivshmem_update_irq(IVShmemState *s) PCIDevice *d = PCI_DEVICE(s); uint32_t isr = s->intrstatus & s->intrmask; + /* No INTx with msi=off, whether the guest enabled MSI-X or not */ + if (ivshmem_has_feature(s, IVSHMEM_MSI)) { + return; + } + /* don't print ISR resets */ if (isr) { IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n", @@ -874,6 +879,10 @@ static void pci_ivshmem_realize(PCIDevice *dev, Error **errp) pci_conf = dev->config; pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY; + /* + * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a + * bald-faced lie then. But it's a backwards compatible lie. + */ pci_config_set_interrupt_pin(pci_conf, 1); memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,