From patchwork Wed Feb 10 03:41:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 581290 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43692140B93 for ; Wed, 10 Feb 2016 14:43:32 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=mIikDGKG; dkim-atps=neutral Received: from localhost ([::1]:35143 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTLgg-0000SR-Av for incoming@patchwork.ozlabs.org; Tue, 09 Feb 2016 22:43:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40775) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTLg6-0007jL-RE for qemu-devel@nongnu.org; Tue, 09 Feb 2016 22:42:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aTLg5-0004LP-DW for qemu-devel@nongnu.org; Tue, 09 Feb 2016 22:42:54 -0500 Received: from mail-qg0-x242.google.com ([2607:f8b0:400d:c04::242]:33797) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTLg5-0004LL-7O for qemu-devel@nongnu.org; Tue, 09 Feb 2016 22:42:53 -0500 Received: by mail-qg0-x242.google.com with SMTP id e61so498864qgf.1 for ; Tue, 09 Feb 2016 19:42:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Dwf8vlY3ZC9Rlqvnx7sxBmT2JsWYRZx90sI8UfxO1E0=; b=mIikDGKGb72buC6J2FUMWZ9dgzrLzuPSd1d3NxLEyYHX2FfNQHp+2VjiDaXErhlur3 kg0vF1JIoZ/sHoDYh4rq75ZwPvPclC0VSHHxibR2Y2OWnet1qDylgR+lbzf/15F14X61 fNClNOVEHho90UyDGuAaRgfY3IxVyhZ44WGXa4bPUMfSixSDkhLPsc3P66GI2RjdVgOZ 9Cv0MTFV+igkkcB5FrmWe4606tBkM9XedIsRCxlhC6dkAmS+N5LTxCTh/lSy2tptJPwq KXYzumBZTXRaKduo2A5M4b/QVAHUKIFaZTYN0wcD/kmixRrHYN2WUXSu+5hCfdDVHUY5 HqVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Dwf8vlY3ZC9Rlqvnx7sxBmT2JsWYRZx90sI8UfxO1E0=; b=CBK0ULCUjJ6fbe2GJ3uT0qf/GW3trtsJDlCj8eK25HIDw/PqtykPzt8qquknNEuTJ+ jF965wmCJNvZRdzXeIaieDnsds+WWFCv1izd1PlW+t4JyIAY3fik/I14AQT+g1Yrv/Yt QN1nO8bTQDIwmPfuIJYb9THxE9ilvlsEllTBfQLVi+REkX1OvcVbhpS+PtuxpezbYGLz vFqYjNZwSd3qmkxv8v02oKTkZJOw6nfQL9OLNzbfGp193/libJ5V1+aMqV5QsRhIVcsg v9qRUyuemYz6mZQVr8c3LvVTaMFgYnIm7+t/zzO7x8wj3nr+22kM9/LYxmOWdQOLx/JX Ur6Q== X-Gm-Message-State: AG10YOTI60OWtvqjJlR6t4FrsyTYryCt0rTL2cw1E/xBmNwmtPcDKEOdjKbGxNxDi9+SEg== X-Received: by 10.140.94.50 with SMTP id f47mr46625071qge.0.1455075772881; Tue, 09 Feb 2016 19:42:52 -0800 (PST) Received: from bigtime.com ([172.56.7.187]) by smtp.gmail.com with ESMTPSA id s90sm528171qgs.13.2016.02.09.19.42.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Feb 2016 19:42:52 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 10 Feb 2016 14:41:45 +1100 Message-Id: <1455075706-9786-4-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1455075706-9786-1-git-send-email-rth@twiddle.net> References: <1455075706-9786-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c04::242 Cc: mark.cave-ayland@ilande.co.uk, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH v3 3/4] target-sparc: Tidy global register initialization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Create tables for the various global registers that need allocation. Remove one level of indirection from gregnames and fregnames. Signed-off-by: Richard Henderson --- target-sparc/translate.c | 157 +++++++++++++++++++++-------------------------- 1 file changed, 70 insertions(+), 87 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 536c4b5..4be56dd 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5329,106 +5329,89 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb) void gen_intermediate_code_init(CPUSPARCState *env) { - unsigned int i; static int inited; - static const char * const gregnames[8] = { - NULL, // g0 not used - "g1", - "g2", - "g3", - "g4", - "g5", - "g6", - "g7", + static const char gregnames[8][4] = { + "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", }; - static const char * const fregnames[32] = { + static const char fregnames[32][4] = { "f0", "f2", "f4", "f6", "f8", "f10", "f12", "f14", "f16", "f18", "f20", "f22", "f24", "f26", "f28", "f30", "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", }; - /* init various static tables */ - if (!inited) { - inited = 1; - - cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); - cpu_regwptr = tcg_global_mem_new_ptr(cpu_env, - offsetof(CPUSPARCState, regwptr), - "regwptr"); + static const struct { TCGv_i32 *ptr; int off; const char *name; } r32[] = { #ifdef TARGET_SPARC64 - cpu_xcc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, xcc), - "xcc"); - cpu_asi = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, asi), - "asi"); - cpu_fprs = tcg_global_mem_new_i32(cpu_env, - offsetof(CPUSPARCState, fprs), - "fprs"); - cpu_gsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, gsr), - "gsr"); - cpu_tick_cmpr = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, tick_cmpr), - "tick_cmpr"); - cpu_stick_cmpr = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, stick_cmpr), - "stick_cmpr"); - cpu_hstick_cmpr = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, hstick_cmpr), - "hstick_cmpr"); - cpu_hintp = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hintp), - "hintp"); - cpu_htba = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, htba), - "htba"); - cpu_hver = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hver), - "hver"); - cpu_ssr = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, ssr), "ssr"); - cpu_ver = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, version), "ver"); - cpu_softint = tcg_global_mem_new_i32(cpu_env, - offsetof(CPUSPARCState, softint), - "softint"); + { &cpu_xcc, offsetof(CPUSPARCState, xcc), "xcc" }, + { &cpu_asi, offsetof(CPUSPARCState, asi), "asi" }, + { &cpu_fprs, offsetof(CPUSPARCState, fprs), "fprs" }, + { &cpu_softint, offsetof(CPUSPARCState, softint), "softint" }, #else - cpu_wim = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, wim), - "wim"); + { &cpu_wim, offsetof(CPUSPARCState, wim), "wim" }, +#endif + { &cpu_cc_op, offsetof(CPUSPARCState, cc_op), "cc_op" }, + { &cpu_psr, offsetof(CPUSPARCState, psr), "psr" }, + }; + + static const struct { TCGv *ptr; int off; const char *name; } rtl[] = { +#ifdef TARGET_SPARC64 + { &cpu_gsr, offsetof(CPUSPARCState, gsr), "gsr" }, + { &cpu_tick_cmpr, offsetof(CPUSPARCState, tick_cmpr), "tick_cmpr" }, + { &cpu_stick_cmpr, offsetof(CPUSPARCState, stick_cmpr), "stick_cmpr" }, + { &cpu_hstick_cmpr, offsetof(CPUSPARCState, hstick_cmpr), + "hstick_cmpr" }, + { &cpu_hintp, offsetof(CPUSPARCState, hintp), "hintp" }, + { &cpu_htba, offsetof(CPUSPARCState, htba), "htba" }, + { &cpu_hver, offsetof(CPUSPARCState, hver), "hver" }, + { &cpu_ssr, offsetof(CPUSPARCState, ssr), "ssr" }, + { &cpu_ver, offsetof(CPUSPARCState, version), "ver" }, #endif - cpu_cond = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, cond), - "cond"); - cpu_cc_src = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, cc_src), - "cc_src"); - cpu_cc_src2 = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, cc_src2), - "cc_src2"); - cpu_cc_dst = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, cc_dst), - "cc_dst"); - cpu_cc_op = tcg_global_mem_new_i32(cpu_env, - offsetof(CPUSPARCState, cc_op), - "cc_op"); - cpu_psr = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, psr), - "psr"); - cpu_fsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, fsr), - "fsr"); - cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, pc), - "pc"); - cpu_npc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, npc), - "npc"); - cpu_y = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, y), "y"); + { &cpu_cond, offsetof(CPUSPARCState, cond), "cond" }, + { &cpu_cc_src, offsetof(CPUSPARCState, cc_src), "cc_src" }, + { &cpu_cc_src2, offsetof(CPUSPARCState, cc_src2), "cc_src2" }, + { &cpu_cc_dst, offsetof(CPUSPARCState, cc_dst), "cc_dst" }, + { &cpu_fsr, offsetof(CPUSPARCState, fsr), "fsr" }, + { &cpu_pc, offsetof(CPUSPARCState, pc), "pc" }, + { &cpu_npc, offsetof(CPUSPARCState, npc), "npc" }, + { &cpu_y, offsetof(CPUSPARCState, y), "y" }, #ifndef CONFIG_USER_ONLY - cpu_tbr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, tbr), - "tbr"); + { &cpu_tbr, offsetof(CPUSPARCState, tbr), "tbr" }, #endif - for (i = 1; i < 8; i++) { - cpu_gregs[i] = tcg_global_mem_new(cpu_env, - offsetof(CPUSPARCState, gregs[i]), - gregnames[i]); - } - for (i = 0; i < TARGET_DPREGS; i++) { - cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUSPARCState, fpr[i]), - fregnames[i]); - } + }; + + unsigned int i; + + /* init various static tables */ + if (inited) { + return; + } + inited = 1; + + cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + + cpu_regwptr = tcg_global_mem_new_ptr(cpu_env, + offsetof(CPUSPARCState, regwptr), + "regwptr"); + + for (i = 0; i < ARRAY_SIZE(r32); ++i) { + *r32[i].ptr = tcg_global_mem_new_i32(cpu_env, r32[i].off, r32[i].name); + } + + for (i = 0; i < ARRAY_SIZE(rtl); ++i) { + *rtl[i].ptr = tcg_global_mem_new(cpu_env, rtl[i].off, rtl[i].name); + } + + TCGV_UNUSED(cpu_gregs[0]); + for (i = 1; i < 8; ++i) { + cpu_gregs[i] = tcg_global_mem_new(cpu_env, + offsetof(CPUSPARCState, gregs[i]), + gregnames[i]); + } + + for (i = 0; i < TARGET_DPREGS; i++) { + cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env, + offsetof(CPUSPARCState, fpr[i]), + fregnames[i]); } }