From patchwork Fri Feb 5 02:13:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 579337 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 078FD140783 for ; Fri, 5 Feb 2016 13:13:37 +1100 (AEDT) Received: from localhost ([::1]:45418 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRVtu-00056m-VV for incoming@patchwork.ozlabs.org; Thu, 04 Feb 2016 21:13:34 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44053) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRVtQ-0004HV-H6 for qemu-devel@nongnu.org; Thu, 04 Feb 2016 21:13:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aRVtP-0004C9-LE for qemu-devel@nongnu.org; Thu, 04 Feb 2016 21:13:04 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:40275) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRVtP-0004Bo-A2; Thu, 04 Feb 2016 21:13:03 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id A6A13140778; Fri, 5 Feb 2016 13:13:00 +1100 (AEDT) From: David Gibson To: benh@kernel.crashing.org, aik@ozlabs.ru, agraf@suse.de Date: Fri, 5 Feb 2016 13:13:55 +1100 Message-Id: <1454638439-11938-3-git-send-email-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1454638439-11938-1-git-send-email-david@gibson.dropbear.id.au> References: <1454638439-11938-1-git-send-email-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2401:3900:2:1::2 Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Subject: [Qemu-devel] [PATCH 2/6] target-ppc: Include missing MMU models for SDR1 in info registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The HMP command "info registers" produces somewhat different information on different ppc cpu variants. For those with a hash MMU it's supposed to include the SDR1, DAR and DSISR registers related to the MMU. However, the switch is missing a couple of MMU model variants, meaning we will miss out this information on certain CPUs which should have it. This patch corrects the oversight. (Really these MMU model IDs need a big cleanup, but we might as well fix the bug in the interim). Signed-off-by: David Gibson Reviewed-by: Alexey Kardashevskiy --- target-ppc/translate.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 0057bda..287d679 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -11352,7 +11352,9 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, case POWERPC_MMU_64B: case POWERPC_MMU_2_03: case POWERPC_MMU_2_06: + case POWERPC_MMU_2_06a: case POWERPC_MMU_2_07: + case POWERPC_MMU_2_07a: #endif cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " DAR " TARGET_FMT_lx " DSISR " TARGET_FMT_lx "\n", env->spr[SPR_SDR1],