From patchwork Wed Feb 3 20:32:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: John Snow X-Patchwork-Id: 578355 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 84D081401C7 for ; Thu, 4 Feb 2016 07:35:09 +1100 (AEDT) Received: from localhost ([::1]:37546 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR48p-000397-Ie for incoming@patchwork.ozlabs.org; Wed, 03 Feb 2016 15:35:07 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35583) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR46W-0006g4-2v for qemu-devel@nongnu.org; Wed, 03 Feb 2016 15:32:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aR46S-0005cL-06 for qemu-devel@nongnu.org; Wed, 03 Feb 2016 15:32:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:51374) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aR46R-0005cE-Ph for qemu-devel@nongnu.org; Wed, 03 Feb 2016 15:32:39 -0500 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id 740AF19F3A1; Wed, 3 Feb 2016 20:32:39 +0000 (UTC) Received: from scv.usersys.redhat.com (vpn-49-112.rdu2.redhat.com [10.10.49.112]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u13KWZEh032297; Wed, 3 Feb 2016 15:32:38 -0500 From: John Snow To: qemu-devel@nongnu.org Date: Wed, 3 Feb 2016 15:32:20 -0500 Message-Id: <1454531555-32022-6-git-send-email-jsnow@redhat.com> In-Reply-To: <1454531555-32022-1-git-send-email-jsnow@redhat.com> References: <1454531555-32022-1-git-send-email-jsnow@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: peter.maydell@linaro.org, jsnow@redhat.com, =?UTF-8?q?Herv=C3=A9=20Poussineau?= Subject: [Qemu-devel] [PULL 05/20] i8257: rename struct dma_regs to I8257Regs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Hervé Poussineau Signed-off-by: Hervé Poussineau Message-id: 1453843944-26833-5-git-send-email-hpoussin@reactos.org Signed-off-by: John Snow --- hw/dma/i8257.c | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c index e560a2f..bf43977 100644 --- a/hw/dma/i8257.c +++ b/hw/dma/i8257.c @@ -38,7 +38,7 @@ #define ldebug(...) #endif -struct dma_regs { +typedef struct I8257Regs { int now[2]; uint16_t base[2]; uint8_t mode; @@ -48,7 +48,7 @@ struct dma_regs { uint8_t eop; DMA_transfer_handler transfer_handler; void *opaque; -}; +} I8257Regs; #define ADDR 0 #define COUNT 1 @@ -59,7 +59,7 @@ typedef struct I8257State { uint8_t mask; uint8_t flip_flop; int dshift; - struct dma_regs regs[4]; + I8257Regs regs[4]; MemoryRegion channel_io; MemoryRegion cont_io; } I8257State; @@ -139,7 +139,7 @@ static uint32_t read_pageh (void *opaque, uint32_t nport) static inline void init_chan(I8257State *d, int ichan) { - struct dma_regs *r; + I8257Regs *r; r = d->regs + ichan; r->now[ADDR] = r->base[ADDR] << d->dshift; @@ -159,7 +159,7 @@ static uint64_t read_chan(void *opaque, hwaddr nport, unsigned size) { I8257State *d = opaque; int ichan, nreg, iport, ff, val, dir; - struct dma_regs *r; + I8257Regs *r; iport = (nport >> d->dshift) & 0x0f; ichan = iport >> 1; @@ -182,7 +182,7 @@ static void write_chan(void *opaque, hwaddr nport, uint64_t data, { I8257State *d = opaque; int iport, ichan, nreg; - struct dma_regs *r; + I8257Regs *r; iport = (nport >> d->dshift) & 0x0f; ichan = iport >> 1; @@ -338,7 +338,7 @@ void DMA_release_DREQ (int nchan) static void channel_run (int ncont, int ichan) { int n; - struct dma_regs *r = &dma_controllers[ncont].regs[ichan]; + I8257Regs *r = &dma_controllers[ncont].regs[ichan]; #ifdef DEBUG_DMA int dir, opmode; @@ -409,7 +409,7 @@ void DMA_register_channel (int nchan, DMA_transfer_handler transfer_handler, void *opaque) { - struct dma_regs *r; + I8257Regs *r; int ichan, ncont; ncont = nchan > 3; @@ -422,7 +422,7 @@ void DMA_register_channel (int nchan, int DMA_read_memory (int nchan, void *buf, int pos, int len) { - struct dma_regs *r = &dma_controllers[nchan > 3].regs[nchan & 3]; + I8257Regs *r = &dma_controllers[nchan > 3].regs[nchan & 3]; hwaddr addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR]; if (r->mode & 0x20) { @@ -444,7 +444,7 @@ int DMA_read_memory (int nchan, void *buf, int pos, int len) int DMA_write_memory (int nchan, void *buf, int pos, int len) { - struct dma_regs *r = &dma_controllers[nchan > 3].regs[nchan & 3]; + I8257Regs *r = &dma_controllers[nchan > 3].regs[nchan & 3]; hwaddr addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR]; if (r->mode & 0x20) { @@ -553,18 +553,18 @@ static void dma_init2(I8257State *d, int base, int dshift, } } -static const VMStateDescription vmstate_dma_regs = { +static const VMStateDescription vmstate_i8257_regs = { .name = "dma_regs", .version_id = 1, .minimum_version_id = 1, .fields = (VMStateField[]) { - VMSTATE_INT32_ARRAY(now, struct dma_regs, 2), - VMSTATE_UINT16_ARRAY(base, struct dma_regs, 2), - VMSTATE_UINT8(mode, struct dma_regs), - VMSTATE_UINT8(page, struct dma_regs), - VMSTATE_UINT8(pageh, struct dma_regs), - VMSTATE_UINT8(dack, struct dma_regs), - VMSTATE_UINT8(eop, struct dma_regs), + VMSTATE_INT32_ARRAY(now, I8257Regs, 2), + VMSTATE_UINT16_ARRAY(base, I8257Regs, 2), + VMSTATE_UINT8(mode, I8257Regs), + VMSTATE_UINT8(page, I8257Regs), + VMSTATE_UINT8(pageh, I8257Regs), + VMSTATE_UINT8(dack, I8257Regs), + VMSTATE_UINT8(eop, I8257Regs), VMSTATE_END_OF_LIST() } }; @@ -586,8 +586,8 @@ static const VMStateDescription vmstate_dma = { VMSTATE_UINT8(mask, I8257State), VMSTATE_UINT8(flip_flop, I8257State), VMSTATE_INT32(dshift, I8257State), - VMSTATE_STRUCT_ARRAY(regs, I8257State, 4, 1, vmstate_dma_regs, - struct dma_regs), + VMSTATE_STRUCT_ARRAY(regs, I8257State, 4, 1, vmstate_i8257_regs, + I8257Regs), VMSTATE_END_OF_LIST() } };