From patchwork Mon Dec 28 17:02:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Mammedov X-Patchwork-Id: 561347 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0015F140C14 for ; Tue, 29 Dec 2015 04:14:04 +1100 (AEDT) Received: from localhost ([::1]:45396 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aDbMw-00052j-F4 for incoming@patchwork.ozlabs.org; Mon, 28 Dec 2015 12:14:02 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34293) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aDbCf-0000VL-VL for qemu-devel@nongnu.org; Mon, 28 Dec 2015 12:03:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aDbCe-00087R-Mo for qemu-devel@nongnu.org; Mon, 28 Dec 2015 12:03:25 -0500 Received: from mx1.redhat.com ([209.132.183.28]:38705) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aDbCe-00087L-Fw for qemu-devel@nongnu.org; Mon, 28 Dec 2015 12:03:24 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 22DE0A3803 for ; Mon, 28 Dec 2015 17:03:24 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id tBSH2wJK021909 for ; Mon, 28 Dec 2015 12:03:23 -0500 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Mon, 28 Dec 2015 18:02:37 +0100 Message-Id: <1451322178-261185-30-git-send-email-imammedo@redhat.com> In-Reply-To: <1451321851-260744-1-git-send-email-imammedo@redhat.com> References: <1451321851-260744-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 30/51] pc: acpi: move PIIX4 isa-bridge and pm devices into SSDT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org and also move PRQx fields declaration as it can't be split out into separate patch since fields use PCI0.ISA.P40C operation region and OperationRegion must be declared in the same table as a Field that uses it. If this condition is not statisfied Windows will BSOD ans IASL (make check) will error out as well. For the same reason pm is moved together with isa-bridge as the later refernces P13C OperationRegion from pm device. Signed-off-by: Igor Mammedov --- hw/i386/acpi-build.c | 77 +++++++++++++++++++++++++++++++++++++++++++-- hw/i386/acpi-dsdt.dsl | 52 +++--------------------------- include/hw/acpi/aml-build.h | 1 + 3 files changed, 81 insertions(+), 49 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 44eb068..88deea5 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -108,6 +108,7 @@ typedef struct AcpiPmInfo { } AcpiPmInfo; typedef struct AcpiMiscInfo { + bool is_piix4; bool has_hpet; TPMVersion tpm_version; const unsigned char *dsdt_code; @@ -130,10 +131,12 @@ static void acpi_get_dsdt(AcpiMiscInfo *info) assert(!!piix != !!lpc); if (piix) { + info->is_piix4 = true; info->dsdt_code = AcpiDsdtAmlCode; info->dsdt_size = sizeof AcpiDsdtAmlCode; } if (lpc) { + info->is_piix4 = false; info->dsdt_code = Q35AcpiDsdtAmlCode; info->dsdt_size = sizeof Q35AcpiDsdtAmlCode; } @@ -1424,6 +1427,68 @@ static void build_dbg_aml(Aml *table) aml_append(table, scope); } +static void build_piix4_pci0_int(Aml *table) +{ + Aml *field; + Aml *sb_scope = aml_scope("_SB"); + + field = aml_field("PCI0.ISA.P40C", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); + aml_append(field, aml_named_field("PRQ0", 8)); + aml_append(field, aml_named_field("PRQ1", 8)); + aml_append(field, aml_named_field("PRQ2", 8)); + aml_append(field, aml_named_field("PRQ3", 8)); + aml_append(sb_scope, field); + + aml_append(table, sb_scope); +} + +static void build_piix4_pm(Aml *table) +{ + Aml *dev; + Aml *scope; + + scope = aml_scope("_SB.PCI0"); + dev = aml_device("PX13"); + aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010003))); + + aml_append(dev, aml_operation_region("P13C", AML_PCI_CONFIG, + 0x00, 0xff)); + aml_append(scope, dev); + aml_append(table, scope); +} + +static void build_piix4_isa_bridge(Aml *table) +{ + Aml *dev; + Aml *scope; + Aml *field; + + scope = aml_scope("_SB.PCI0"); + dev = aml_device("ISA"); + aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010000))); + + /* PIIX PCI to ISA irq remapping */ + aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG, + 0x60, 0x04)); + /* enable bits */ + field = aml_field("^PX13.P13C", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); + /* Offset(0x5f),, 7, */ + aml_append(field, aml_reserved_field(0x2f8)); + aml_append(field, aml_reserved_field(7)); + aml_append(field, aml_named_field("LPEN", 1)); + /* Offset(0x67),, 3, */ + aml_append(field, aml_reserved_field(0x38)); + aml_append(field, aml_reserved_field(3)); + aml_append(field, aml_named_field("CAEN", 1)); + aml_append(field, aml_reserved_field(3)); + aml_append(field, aml_named_field("CBEN", 1)); + aml_append(dev, field); + aml_append(dev, aml_name_decl("FDEN", aml_int(1))); + + aml_append(scope, dev); + aml_append(table, scope); +} + static void build_ssdt(GArray *table_data, GArray *linker, AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc, @@ -1445,8 +1510,16 @@ build_ssdt(GArray *table_data, GArray *linker, acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader)); build_dbg_aml(ssdt); - build_hpet_aml(ssdt); - build_isa_devices_aml(ssdt); + if (misc->is_piix4) { + build_hpet_aml(ssdt); + build_piix4_pm(ssdt); + build_piix4_isa_bridge(ssdt); + build_isa_devices_aml(ssdt); + build_piix4_pci0_int(ssdt); + } else { + build_hpet_aml(ssdt); + build_isa_devices_aml(ssdt); + } build_cpu_hotplug_aml(ssdt); build_memory_hotplug_aml(ssdt, nr_mem, pm->mem_hp_io_base, pm->mem_hp_io_len); diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl index 6048cc7..11e2e61 100644 --- a/hw/i386/acpi-dsdt.dsl +++ b/hw/i386/acpi-dsdt.dsl @@ -40,47 +40,6 @@ DefinitionBlock ( } /**************************************************************** - * PIIX4 PM - ****************************************************************/ - - Scope(\_SB.PCI0) { - Device(PX13) { - Name(_ADR, 0x00010003) - OperationRegion(P13C, PCI_Config, 0x00, 0xff) - } - } - - -/**************************************************************** - * PIIX3 ISA bridge - ****************************************************************/ - - Scope(\_SB.PCI0) { - - External(ISA, DeviceObj) - - Device(ISA) { - Name(_ADR, 0x00010000) - - /* PIIX PCI to ISA irq remapping */ - OperationRegion(P40C, PCI_Config, 0x60, 0x04) - - /* enable bits */ - Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) { - Offset(0x5f), - , 7, - LPEN, 1, // LPT - Offset(0x67), - , 3, - CAEN, 1, // COM1 - , 3, - CBEN, 1, // COM2 - } - Name(FDEN, 1) - } - } - -/**************************************************************** * PCI hotplug ****************************************************************/ @@ -168,12 +127,11 @@ DefinitionBlock ( } } - Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) { - PRQ0, 8, - PRQ1, 8, - PRQ2, 8, - PRQ3, 8 - } + + External(PRQ0, FieldUnitObj) + External(PRQ1, FieldUnitObj) + External(PRQ2, FieldUnitObj) + External(PRQ3, FieldUnitObj) Method(IQST, 1, NotSerialized) { // _STA method - get status diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 83c0102..6d6f705 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -82,6 +82,7 @@ typedef enum { typedef enum { AML_SYSTEM_MEMORY = 0X00, AML_SYSTEM_IO = 0X01, + AML_PCI_CONFIG = 0X02, } AmlRegionSpace; typedef enum {