@@ -53,7 +53,7 @@ enum {
};
typedef struct {
- ARMCPU *cpu;
+ struct ARMCPU *cpu;
MemoryRegion sdram;
DeviceState *pic;
DeviceState *gpio;
@@ -16,6 +16,8 @@
#include "qemu/notify.h"
#include "cpu.h"
+struct ARMCPU;
+
/* armv7m.c */
DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
const char *kernel_filename, const char *cpu_model);
@@ -26,7 +28,7 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
*/
typedef struct {
Notifier notifier; /* actual notifier */
- ARMCPU *cpu; /* handle to the first cpu object */
+ struct ARMCPU *cpu; /* handle to the first cpu object */
} ArmLoadKernelNotifier;
/* arm_boot.c */
@@ -60,9 +62,9 @@ struct arm_boot_info {
* perform any necessary CPU reset handling and set the PC for the
* secondary CPUs to point at this boot blob.
*/
- void (*write_secondary_boot)(ARMCPU *cpu,
+ void (*write_secondary_boot)(struct ARMCPU *cpu,
const struct arm_boot_info *info);
- void (*secondary_cpu_reset_hook)(ARMCPU *cpu,
+ void (*secondary_cpu_reset_hook)(struct ARMCPU *cpu,
const struct arm_boot_info *info);
/* if a board is able to create a dtb without a dtb file then it
* sets get_dtb. This will only be used if no dtb file is provided
@@ -95,7 +97,7 @@ struct arm_boot_info {
* to the specified address.
*/
hwaddr board_setup_addr;
- void (*write_board_setup)(ARMCPU *cpu,
+ void (*write_board_setup)(struct ARMCPU *cpu,
const struct arm_boot_info *info);
/* If set, the board specific loader/setup blob will be run from secure
@@ -120,7 +122,7 @@ struct arm_boot_info {
* before sysbus-fdt arm_register_platform_bus_fdt_creator. Indeed the
* machine init done notifiers are called in registration reverse order.
*/
-void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info);
+void arm_load_kernel(struct ARMCPU *cpu, struct arm_boot_info *info);
/* Multiplication factor to convert from system clock ticks to qemu timer
ticks. */
@@ -28,6 +28,7 @@
#include "qemu-common.h"
#include "exec/memory.h"
+#include "hw/arm/arm.h"
#define EXYNOS4210_NCPUS 2
@@ -85,7 +86,7 @@ typedef struct Exynos4210Irq {
} Exynos4210Irq;
typedef struct Exynos4210State {
- ARMCPU *cpu[EXYNOS4210_NCPUS];
+ struct ARMCPU *cpu[EXYNOS4210_NCPUS];
Exynos4210Irq irqs;
qemu_irq *irq_table;
@@ -100,7 +101,7 @@ typedef struct Exynos4210State {
I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER];
} Exynos4210State;
-void exynos4210_write_secondary(ARMCPU *cpu,
+void exynos4210_write_secondary(struct ARMCPU *cpu,
const struct arm_boot_info *info);
Exynos4210State *exynos4210_init(MemoryRegion *system_mem,
@@ -790,6 +790,8 @@ I2CBus *omap_i2c_bus(DeviceState *omap_i2c);
# define cpu_class_omap3(cpu) \
(cpu_is_omap3430(cpu) || cpu_is_omap3630(cpu))
+struct ARMCPU;
+
struct omap_mpu_state_s {
enum omap_mpu_model {
omap310,
@@ -805,7 +807,7 @@ struct omap_mpu_state_s {
omap3630,
} mpu_model;
- ARMCPU *cpu;
+ struct ARMCPU *cpu;
qemu_irq *drq;
@@ -64,12 +64,14 @@
# define PXA2XX_INTERNAL_BASE 0x5c000000
# define PXA2XX_INTERNAL_SIZE 0x40000
+struct ARMCPU;
+
/* pxa2xx_pic.c */
-DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu);
+DeviceState *pxa2xx_pic_init(hwaddr base, struct ARMCPU *cpu);
/* pxa2xx_gpio.c */
DeviceState *pxa2xx_gpio_init(hwaddr base,
- ARMCPU *cpu, DeviceState *pic, int lines);
+ struct ARMCPU *cpu, DeviceState *pic, int lines);
void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler);
/* pxa2xx_dma.c */
@@ -122,7 +124,7 @@ typedef struct PXA2xxI2SState PXA2xxI2SState;
typedef struct PXA2xxFIrState PXA2xxFIrState;
typedef struct {
- ARMCPU *cpu;
+ struct ARMCPU *cpu;
DeviceState *pic;
qemu_irq reset;
MemoryRegion sdram;
This removes a dependency on cpu.h. Since this is in most cases the _only_ dependency on cpu.h, removing it now makes it easier to disentangle qemu-common.h and cpu.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- hw/arm/strongarm.h | 2 +- include/hw/arm/arm.h | 12 +++++++----- include/hw/arm/exynos4210.h | 5 +++-- include/hw/arm/omap.h | 4 +++- include/hw/arm/pxa.h | 8 +++++--- 5 files changed, 19 insertions(+), 12 deletions(-)