From patchwork Fri Dec 4 15:00:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 552738 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2F2E614031D for ; Sat, 5 Dec 2015 02:01:34 +1100 (AEDT) Received: from localhost ([::1]:41440 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a4rrY-0004PF-36 for incoming@patchwork.ozlabs.org; Fri, 04 Dec 2015 10:01:32 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52432) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a4rr9-0003nk-7p for qemu-devel@nongnu.org; Fri, 04 Dec 2015 10:01:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a4rr8-0008Ko-6Z for qemu-devel@nongnu.org; Fri, 04 Dec 2015 10:01:07 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52911) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a4rr8-0008Kk-12 for qemu-devel@nongnu.org; Fri, 04 Dec 2015 10:01:06 -0500 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id 9FEE819CB9C; Fri, 4 Dec 2015 15:01:05 +0000 (UTC) Received: from localhost (ovpn-113-154.phx2.redhat.com [10.3.113.154]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id tB4F147G011131; Fri, 4 Dec 2015 10:01:05 -0500 From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Fri, 4 Dec 2015 13:00:54 -0200 Message-Id: <1449241255-26069-3-git-send-email-ehabkost@redhat.com> In-Reply-To: <1449241255-26069-1-git-send-email-ehabkost@redhat.com> References: <1449241255-26069-1-git-send-email-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: Huaitong Han , Paolo Bonzini , kvm@vger.kernel.org, Richard Henderson Subject: [Qemu-devel] [PATCH v3 2/3] target-i386: Use xsave structs for ext_save_area X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This doesn't introduce any change in the code, as the offsets and struct sizes match what was present in the table. This can be validated by the QEMU_BUILD_BUG_ON lines on target-i386/cpu.h, which ensures the struct sizes and offsets match the existing values in ext_save_area. Signed-off-by: Eduardo Habkost --- Changes series v1 -> v2 * (none) Changes series v2 -> v3: * Added PKRU state --- target-i386/cpu.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index a3de18d..c4cfedb 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -477,19 +477,26 @@ typedef struct ExtSaveArea { static const ExtSaveArea ext_save_areas[] = { [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX, - .offset = 0x240, .size = 0x100 }, + .offset = offsetof(X86XSaveArea, avx_state), + .size = sizeof(XSaveAVX) }, [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, - .offset = 0x3c0, .size = 0x40 }, + .offset = offsetof(X86XSaveArea, bndreg_state), + .size = sizeof(XSaveBNDREG) }, [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, - .offset = 0x400, .size = 0x40 }, + .offset = offsetof(X86XSaveArea, bndcsr_state), + .size = sizeof(XSaveBNDCSR) }, [5] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, - .offset = 0x440, .size = 0x40 }, + .offset = offsetof(X86XSaveArea, opmask_state), + .size = sizeof(XSaveOpmask) }, [6] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, - .offset = 0x480, .size = 0x200 }, + .offset = offsetof(X86XSaveArea, zmm_hi256_state), + .size = sizeof(XSaveZMM_Hi256) }, [7] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, - .offset = 0x680, .size = 0x400 }, + .offset = offsetof(X86XSaveArea, hi16_zmm_state), + .size = sizeof(XSaveHi16_ZMM) }, [9] = { .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU, - .offset = 0xA80, .size = 0x8 }, + .offset = offsetof(X86XSaveArea, pkru_state), + .size = sizeof(XSavePKRU) }, }; const char *get_register_name_32(unsigned int reg)