From patchwork Mon Nov 16 14:05:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 545202 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9151F141460 for ; Tue, 17 Nov 2015 09:17:28 +1100 (AEDT) Received: from localhost ([::1]:50597 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZyS5W-00079b-ND for incoming@patchwork.ozlabs.org; Mon, 16 Nov 2015 17:17:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58637) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZyKPg-0003lO-EI for qemu-devel@nongnu.org; Mon, 16 Nov 2015 09:05:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZyKPW-0002LG-8h for qemu-devel@nongnu.org; Mon, 16 Nov 2015 09:05:44 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35426) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZyKPV-0002Jj-TM; Mon, 16 Nov 2015 09:05:34 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZyKPL-00012s-D7; Mon, 16 Nov 2015 14:05:23 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 16 Nov 2015 14:05:08 +0000 Message-Id: <1447682723-3977-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1447682723-3977-1-git-send-email-peter.maydell@linaro.org> References: <1447682723-3977-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: patches@linaro.org, qemu-arm@nongnu.org, Paolo Bonzini , "Edgar E. Iglesias" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [Qemu-devel] [PATCH v2 04/19] include/qom/cpu.h: Add new get_phys_page_attrs_debug method X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add a new optional method get_phys_page_attrs_debug to CPUClass. This is like the existing get_phys_page_debug, but also returns the memory transaction attributes to use for the access. This will be necessary for CPUs which have multiple address spaces and use the attributes to select the correct address space. We provide a wrapper function cpu_get_phys_page_attrs_debug() which falls back to the existing get_phys_page_debug(), so we don't need to change every target CPU. Signed-off-by: Peter Maydell --- include/qom/cpu.h | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index ae17932..58605a5 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -98,6 +98,10 @@ struct TranslationBlock; * #TranslationBlock. * @handle_mmu_fault: Callback for handling an MMU fault. * @get_phys_page_debug: Callback for obtaining a physical address. + * @get_phys_page_attrs_debug: Callback for obtaining a physical address and the + * associated memory transaction attributes to use for the access. + * CPUs which use memory transaction attributes should implement this + * instead of get_phys_page_debug. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. * @debug_excp_handler: Callback for handling debug exceptions. @@ -152,6 +156,8 @@ typedef struct CPUClass { int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw, int mmu_index); hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr); + hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr, + MemTxAttrs *attrs); int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); void (*debug_excp_handler)(CPUState *cpu); @@ -445,6 +451,32 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, #ifndef CONFIG_USER_ONLY /** + * cpu_get_phys_page_attrs_debug: + * @cpu: The CPU to obtain the physical page address for. + * @addr: The virtual address. + * @attrs: Updated on return with the memory transaction attributes to use + * for this access. + * + * Obtains the physical page corresponding to a virtual one, together + * with the corresponding memory transaction attributes to use for the access. + * Use it only for debugging because no protection checks are done. + * + * Returns: Corresponding physical page address or -1 if no page found. + */ +static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, + MemTxAttrs *attrs) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + + if (cc->get_phys_page_attrs_debug) { + return cc->get_phys_page_attrs_debug(cpu, addr, attrs); + } + /* Fallback for CPUs which don't implement the _attrs_ hook */ + *attrs = MEMTXATTRS_UNSPECIFIED; + return cc->get_phys_page_debug(cpu, addr); +} + +/** * cpu_get_phys_page_debug: * @cpu: The CPU to obtain the physical page address for. * @addr: The virtual address. @@ -456,9 +488,9 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, */ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr) { - CPUClass *cc = CPU_GET_CLASS(cpu); + MemTxAttrs attrs = {}; - return cc->get_phys_page_debug(cpu, addr); + return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs); } #endif