From patchwork Wed Nov 11 00:28:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 542719 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4ED35141429 for ; Wed, 11 Nov 2015 11:56:26 +1100 (AEDT) Received: from localhost ([::1]:36696 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwJi4-0008GN-GP for incoming@patchwork.ozlabs.org; Tue, 10 Nov 2015 19:56:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38811) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwJK7-0004Wp-K2 for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZwJK6-00053e-Dt for qemu-devel@nongnu.org; Tue, 10 Nov 2015 19:31:39 -0500 Received: from gate.crashing.org ([63.228.1.57]:48724) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZwJK6-00053T-5l; Tue, 10 Nov 2015 19:31:38 -0500 Received: from pasglop.ozlabs.ibm.com. (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id tAB0Sb3G024031; Tue, 10 Nov 2015 18:31:20 -0600 From: Benjamin Herrenschmidt To: qemu-ppc@nongnu.org Date: Wed, 11 Nov 2015 11:28:15 +1100 Message-Id: <1447201710-10229-63-git-send-email-benh@kernel.crashing.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> References: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 63.228.1.57 Cc: qemu-devel@nongnu.org Subject: [Qemu-devel] [PATCH 62/77] ppc: Add dummy SPR_IC for POWER8 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org It's supposed to be an instruction counter. For now make us not crash when accessing it. Signed-off-by: Benjamin Herrenschmidt --- target-ppc/cpu.h | 1 + target-ppc/translate_init.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 099b8da..eb94244 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1690,6 +1690,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_MPC_MD_DBRAM1 (0x32A) #define SPR_RCPU_L2U_RA3 (0x32B) #define SPR_TAR (0x32F) +#define SPR_IC (0x350) #define SPR_VTB (0x351) #define SPR_MMCRC (0x353) #define SPR_440_INV0 (0x370) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index e2efdf3..f3f6cf5 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8084,6 +8084,17 @@ static void gen_spr_power8_dbell(CPUPPCState *env) #endif } +static void gen_spr_power8_ic(CPUPPCState *env) +{ +#if !defined(CONFIG_USER_ONLY) + spr_register_hv(env, SPR_IC, "IC", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0); +#endif +} + static void init_proc_book3s_64(CPUPPCState *env, int version) { gen_spr_ne_601(env); @@ -8137,6 +8148,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version) gen_spr_vtb(env); gen_spr_power8_rpr(env); gen_spr_power8_dbell(env); + gen_spr_power8_ic(env); } if (version < BOOK3S_CPU_POWER8) { gen_spr_book3s_dbg(env);