From patchwork Mon Oct 26 18:12:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 536144 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 70DE71402C4 for ; Tue, 27 Oct 2015 05:13:39 +1100 (AEDT) Received: from localhost ([::1]:54449 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqmH3-0004MH-F3 for incoming@patchwork.ozlabs.org; Mon, 26 Oct 2015 14:13:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48454) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqmGa-0003d5-5y for qemu-devel@nongnu.org; Mon, 26 Oct 2015 14:13:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZqmGZ-0002FU-9F for qemu-devel@nongnu.org; Mon, 26 Oct 2015 14:13:08 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35195) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqmGZ-00029a-2Z for qemu-devel@nongnu.org; Mon, 26 Oct 2015 14:13:07 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZqmGQ-00009o-Q5; Mon, 26 Oct 2015 18:12:58 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 26 Oct 2015 18:12:57 +0000 Message-Id: <1445883178-576-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1445883178-576-1-git-send-email-peter.maydell@linaro.org> References: <1445883178-576-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: "Edgar E. Iglesias" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , patches@linaro.org Subject: [Qemu-devel] [PATCH for-2.5 1/2] target-arm: Bring AArch64 debug CPU display of PSTATE into line with AArch32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The AArch64 debug CPU display of PSTATE as "PSTATE=200003c5 (flags --C-)" on the end of the same line as the last of the general purpose registers is unnecessarily different from the AArch32 display of PSR as "PSR=200001d3 --C- A svc32" on its own line. Update the AArch64 code to put PSTATE in its own line and in the same format, including printing the exception level (mode). Signed-off-by: Peter Maydell Reviewed-by: Alex Bennée --- target-arm/translate-a64.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 19f9d8d..ccefa7b 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -126,6 +126,7 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, CPUARMState *env = &cpu->env; uint32_t psr = pstate_read(env); int i; + int el = arm_current_el(env); cpu_fprintf(f, "PC=%016"PRIx64" SP=%016"PRIx64"\n", env->pc, env->xregs[31]); @@ -137,13 +138,14 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, cpu_fprintf(f, " "); } } - cpu_fprintf(f, "PSTATE=%08x (flags %c%c%c%c)\n", + cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c EL%d%c\n", psr, psr & PSTATE_N ? 'N' : '-', psr & PSTATE_Z ? 'Z' : '-', psr & PSTATE_C ? 'C' : '-', - psr & PSTATE_V ? 'V' : '-'); - cpu_fprintf(f, "\n"); + psr & PSTATE_V ? 'V' : '-', + el, + psr & PSTATE_SP ? 'h' : 't'); if (flags & CPU_DUMP_FPU) { int numvfpregs = 32;