From patchwork Mon Oct 26 13:01:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgar E. Iglesias" X-Patchwork-Id: 535936 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4AF2A14017E for ; Tue, 27 Oct 2015 00:06:34 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=W+hmsXPH; dkim-atps=neutral Received: from localhost ([::1]:52788 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqhTs-00069f-2P for incoming@patchwork.ozlabs.org; Mon, 26 Oct 2015 09:06:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44976) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqhPy-0007Qv-Ps for qemu-devel@nongnu.org; Mon, 26 Oct 2015 09:02:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZqhPu-0002Ws-Vr for qemu-devel@nongnu.org; Mon, 26 Oct 2015 09:02:30 -0400 Received: from mail-pa0-x22f.google.com ([2607:f8b0:400e:c03::22f]:35792) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZqhPu-0002WX-Qj for qemu-devel@nongnu.org; Mon, 26 Oct 2015 09:02:26 -0400 Received: by pasz6 with SMTP id z6so188258973pas.2 for ; Mon, 26 Oct 2015 06:02:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oAXdd+xUFCq7Ck0gAjpLIK54ynLq5GeIacHQEKkCZ+M=; b=W+hmsXPHpYUjJDlkMQZ5FUPy1gY92E3u6iP6AL3vvv+loRExXmlQRAqh1vEzmepAb1 tXnXx6XWPCsZqzv2+x0OglmXvCnn0VdjrrXvAFeNzJRonBDRU4NVe6V5BnF/JrzzNf0y F/yu/wA3LAThzoMUbvwDasUQMwsIefzW/8eC/2GW+xT6CfQuXI1RNFBW/3ksw+lSmD6U iaj6+5HOv0nDhYeQ59kQ2kAKtaKHc+cj3SizuwquwH05MeQSt9Ae02rJY8DMNlrKeXds /q+Cv7M4BoE0U7hrfsF8YUQm3hc6ktnItJwl+xlv2yfh73p3ZuEizF5x9KpHjSRe7wVQ dxuA== X-Received: by 10.68.57.208 with SMTP id k16mr41984311pbq.12.1445864546245; Mon, 26 Oct 2015 06:02:26 -0700 (PDT) Received: from localhost (ec2-52-8-89-49.us-west-1.compute.amazonaws.com. [52.8.89.49]) by smtp.gmail.com with ESMTPSA id rc5sm33951458pbc.95.2015.10.26.06.02.24 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 26 Oct 2015 06:02:25 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Mon, 26 Oct 2015 14:01:56 +0100 Message-Id: <1445864527-14520-4-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445864527-14520-1-git-send-email-edgar.iglesias@gmail.com> References: <1445864527-14520-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::22f Cc: laurent.desnogues@gmail.com, serge.fdrv@gmail.com, edgar.iglesias@xilinx.com, alex.bennee@linaro.org, agraf@suse.de Subject: [Qemu-devel] [PATCH v5 03/14] target-arm: lpae: Move declaration of t0sz and t1sz X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Move declaration of t0sz and t1sz to the top of the function avoiding a mix of code and variable declarations. No functional change. Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 149a857..4d8a25a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6464,6 +6464,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, MMUFaultType fault_type = translation_fault; uint32_t level = 1; uint32_t epd = 0; + int32_t t0sz, t1sz; int32_t tsz; uint32_t tg; uint64_t ttbr; @@ -6519,12 +6520,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * This is a Non-secure PL0/1 stage 1 translation, so controlled by * TTBCR/TTBR0/TTBR1 in accordance with ARM ARM DDI0406C table B-32: */ - int32_t t0sz = extract32(tcr->raw_tcr, 0, 6); + t0sz = extract32(tcr->raw_tcr, 0, 6); if (va_size == 64) { t0sz = MIN(t0sz, 39); t0sz = MAX(t0sz, 16); } - int32_t t1sz = extract32(tcr->raw_tcr, 16, 6); + t1sz = extract32(tcr->raw_tcr, 16, 6); if (va_size == 64) { t1sz = MIN(t1sz, 39); t1sz = MAX(t1sz, 16);