From patchwork Tue Oct 20 15:00:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cornelia Huck X-Patchwork-Id: 533042 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 185FB1401DE for ; Wed, 21 Oct 2015 02:27:52 +1100 (AEDT) Received: from localhost ([::1]:46372 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoYpK-00015I-1S for incoming@patchwork.ozlabs.org; Tue, 20 Oct 2015 11:27:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54260) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoYP3-0005J5-Sa for qemu-devel@nongnu.org; Tue, 20 Oct 2015 11:00:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZoYOy-0004f1-3y for qemu-devel@nongnu.org; Tue, 20 Oct 2015 11:00:41 -0400 Received: from e06smtp08.uk.ibm.com ([195.75.94.104]:44013) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZoYOx-0004ed-QQ for qemu-devel@nongnu.org; Tue, 20 Oct 2015 11:00:36 -0400 Received: from localhost by e06smtp08.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 20 Oct 2015 16:00:31 +0100 X-IBM-Helo: d06dlp02.portsmouth.uk.ibm.com X-IBM-MailFrom: cornelia.huck@de.ibm.com X-IBM-RcptTo: qemu-devel@nongnu.org Received: from b06cxnps3074.portsmouth.uk.ibm.com (d06relay09.portsmouth.uk.ibm.com [9.149.109.194]) by d06dlp02.portsmouth.uk.ibm.com (Postfix) with ESMTP id 4CA3B219004D for ; Tue, 20 Oct 2015 16:00:28 +0100 (BST) Received: from d06av06.portsmouth.uk.ibm.com (d06av06.portsmouth.uk.ibm.com [9.149.37.217]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t9KF0U6F10289540 for ; Tue, 20 Oct 2015 15:00:30 GMT Received: from d06av06.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av06.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t9KF0TlS025337 for ; Tue, 20 Oct 2015 09:00:30 -0600 Received: from gondolin.boeblingen.de.ibm.com (dyn-9-152-224-100.boeblingen.de.ibm.com [9.152.224.100]) by d06av06.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t9KF0SBJ025219 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 20 Oct 2015 09:00:29 -0600 From: Cornelia Huck To: peter.maydell@linaro.org Date: Tue, 20 Oct 2015 17:00:20 +0200 Message-Id: <1445353225-16775-5-git-send-email-cornelia.huck@de.ibm.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1445353225-16775-1-git-send-email-cornelia.huck@de.ibm.com> References: <1445353225-16775-1-git-send-email-cornelia.huck@de.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15102015-0033-0000-0000-00000481A55E X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 195.75.94.104 Cc: Cornelia Huck , borntraeger@de.ibm.com, jfrei@linux.vnet.ibm.com, qemu-devel@nongnu.org, agraf@suse.de Subject: [Qemu-devel] [PULL 4/9] s390x: flagify mcic values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Instead of using magic values when building the machine check interruption code, add some defines as by chapter 11-14 in the PoP. This should make it easier to catch problems like the missing vector register validity bit ("s390x/kvm: Fix vector validity bit in device machine checks"), and less hassle should we want to generate machine checks beyond the channel reports we currently support. Acked-by: David Hildenbrand Signed-off-by: Cornelia Huck --- target-s390x/cpu.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ target-s390x/kvm.c | 23 +++++++++++++++++++---- 2 files changed, 64 insertions(+), 4 deletions(-) diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index e4de863..07ae16c 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -1275,4 +1275,49 @@ static inline bool vregs_needed(void *opaque) return 0; } #endif + +/* machine check interruption code */ + +/* subclasses */ +#define MCIC_SC_SD 0x8000000000000000ULL +#define MCIC_SC_PD 0x4000000000000000ULL +#define MCIC_SC_SR 0x2000000000000000ULL +#define MCIC_SC_CD 0x0800000000000000ULL +#define MCIC_SC_ED 0x0400000000000000ULL +#define MCIC_SC_DG 0x0100000000000000ULL +#define MCIC_SC_W 0x0080000000000000ULL +#define MCIC_SC_CP 0x0040000000000000ULL +#define MCIC_SC_SP 0x0020000000000000ULL +#define MCIC_SC_CK 0x0010000000000000ULL + +/* subclass modifiers */ +#define MCIC_SCM_B 0x0002000000000000ULL +#define MCIC_SCM_DA 0x0000000020000000ULL +#define MCIC_SCM_AP 0x0000000000080000ULL + +/* storage errors */ +#define MCIC_SE_SE 0x0000800000000000ULL +#define MCIC_SE_SC 0x0000400000000000ULL +#define MCIC_SE_KE 0x0000200000000000ULL +#define MCIC_SE_DS 0x0000100000000000ULL +#define MCIC_SE_IE 0x0000000080000000ULL + +/* validity bits */ +#define MCIC_VB_WP 0x0000080000000000ULL +#define MCIC_VB_MS 0x0000040000000000ULL +#define MCIC_VB_PM 0x0000020000000000ULL +#define MCIC_VB_IA 0x0000010000000000ULL +#define MCIC_VB_FA 0x0000008000000000ULL +#define MCIC_VB_VR 0x0000004000000000ULL +#define MCIC_VB_EC 0x0000002000000000ULL +#define MCIC_VB_FP 0x0000001000000000ULL +#define MCIC_VB_GR 0x0000000800000000ULL +#define MCIC_VB_CR 0x0000000400000000ULL +#define MCIC_VB_ST 0x0000000100000000ULL +#define MCIC_VB_AR 0x0000000040000000ULL +#define MCIC_VB_PR 0x0000000000200000ULL +#define MCIC_VB_FC 0x0000000000100000ULL +#define MCIC_VB_CT 0x0000000000020000ULL +#define MCIC_VB_CC 0x0000000000010000ULL + #endif diff --git a/target-s390x/kvm.c b/target-s390x/kvm.c index e1acdac..6e488d4 100644 --- a/target-s390x/kvm.c +++ b/target-s390x/kvm.c @@ -2065,16 +2065,31 @@ void kvm_s390_io_interrupt(uint16_t subchannel_id, kvm_s390_floating_interrupt(&irq); } +static uint64_t build_channel_report_mcic(void) +{ + uint64_t mcic; + + /* subclass: indicate channel report pending */ + mcic = MCIC_SC_CP | + /* subclass modifiers: none */ + /* storage errors: none */ + /* validity bits: no damage */ + MCIC_VB_WP | MCIC_VB_MS | MCIC_VB_PM | MCIC_VB_IA | MCIC_VB_FP | + MCIC_VB_GR | MCIC_VB_CR | MCIC_VB_ST | MCIC_VB_AR | MCIC_VB_PR | + MCIC_VB_FC | MCIC_VB_CT | MCIC_VB_CC; + if (kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { + mcic |= MCIC_VB_VR; + } + return mcic; +} + void kvm_s390_crw_mchk(void) { struct kvm_s390_irq irq = { .type = KVM_S390_MCHK, .u.mchk.cr14 = 1 << 28, - .u.mchk.mcic = 0x00400f1d40330000ULL, + .u.mchk.mcic = build_channel_report_mcic(), }; - if (kvm_check_extension(kvm_state, KVM_CAP_S390_VECTOR_REGISTERS)) { - irq.u.mchk.mcic |= 0x0000004000000000ULL; - } kvm_s390_floating_interrupt(&irq); }