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[52.8.89.49]) by smtp.gmail.com with ESMTPSA id d13sm11568819pbu.20.2015.10.14.15.56.09 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 14 Oct 2015 15:56:10 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Thu, 15 Oct 2015 00:55:37 +0200 Message-Id: <1444863346-9711-5-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> References: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::22c Cc: laurent.desnogues@gmail.com, serge.fdrv@gmail.com, edgar.iglesias@xilinx.com, alex.bennee@linaro.org, agraf@suse.de Subject: [Qemu-devel] [PATCH v4 04/13] target-arm: lpae: Replace tsz with computed inputsize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: "Edgar E. Iglesias" Remove the tsz variable and introduce inputsize. This simplifies the code a little and makes it easier to compare with the reference manuals. No functional change. Signed-off-by: Edgar E. Iglesias Reviewed-by: Peter Maydell --- target-arm/helper.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index a8a46db..9da50ab 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6416,7 +6416,6 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, MMUFaultType fault_type = translation_fault; uint32_t level = 1; uint32_t epd = 0; - int32_t tsz; uint32_t tg; uint64_t ttbr; int ttbr_select; @@ -6426,6 +6425,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, uint32_t attrs; int32_t granule_sz = 9; int32_t va_size = 32; + int inputsize; int32_t tbi = 0; TCR *tcr = regime_tcr(env, mmu_idx); int ap, ns, xn, pxn; @@ -6523,7 +6523,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, if (el < 2) { epd = extract32(tcr->raw_tcr, 7, 1); } - tsz = t0sz; + inputsize = va_size - t0sz; tg = extract32(tcr->raw_tcr, 14, 2); if (tg == 1) { /* 64KB pages */ @@ -6538,7 +6538,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, ttbr = regime_ttbr(env, mmu_idx, 1); epd = extract32(tcr->raw_tcr, 23, 1); - tsz = t1sz; + inputsize = va_size - t1sz; tg = extract32(tcr->raw_tcr, 30, 2); if (tg == 3) { /* 64KB pages */ @@ -6550,7 +6550,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, } /* Here we should have set up all the parameters for the translation: - * va_size, ttbr, epd, tsz, granule_sz, tbi + * va_size, inputsize, ttbr, epd, granule_sz, tbi */ if (epd) { @@ -6565,27 +6565,27 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * of strides (granule_sz bits at a time) needed to consume the bits * of the input address. In the pseudocode this is: * level = 4 - RoundUp((inputsize - grainsize) / stride) - * where their 'inputsize' is our 'va_size - tsz', 'grainsize' is + * where their 'inputsize' is our 'inputsize', 'grainsize' is * our 'granule_sz + 3' and 'stride' is our 'granule_sz'. * Applying the usual "rounded up m/n is (m+n-1)/n" and simplifying: - * = 4 - (va_size - tsz - granule_sz - 3 + granule_sz - 1) / granule_sz - * = 4 - (va_size - tsz - 4) / granule_sz; + * = 4 - (inputsize - granule_sz - 3 + granule_sz - 1) / granule_sz + * = 4 - (inputsize - 4) / granule_sz; */ - level = 4 - (va_size - tsz - 4) / granule_sz; + level = 4 - (inputsize - 4) / granule_sz; /* Clear the vaddr bits which aren't part of the within-region address, * so that we don't have to special case things when calculating the * first descriptor address. */ - if (tsz) { - address &= (1ULL << (va_size - tsz)) - 1; + if (va_size != inputsize) { + address &= (1ULL << inputsize) - 1; } descmask = (1ULL << (granule_sz + 3)) - 1; /* Now we can extract the actual base address from the TTBR */ descaddr = extract64(ttbr, 0, 48); - descaddr &= ~((1ULL << (va_size - tsz - (granule_sz * (4 - level)))) - 1); + descaddr &= ~((1ULL << (inputsize - (granule_sz * (4 - level)))) - 1); /* Secure accesses start with the page table in secure memory and * can be downgraded to non-secure at any step. Non-secure accesses