From patchwork Wed Oct 14 05:54:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 530011 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 66CB9140E43 for ; Wed, 14 Oct 2015 16:57:10 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=UnkJnKgP; dkim-atps=neutral Received: from localhost ([::1]:40617 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmF3k-0004CT-33 for incoming@patchwork.ozlabs.org; Wed, 14 Oct 2015 01:57:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57826) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmF1e-0001du-9v for qemu-devel@nongnu.org; Wed, 14 Oct 2015 01:54:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZmF1b-0006PH-MV for qemu-devel@nongnu.org; Wed, 14 Oct 2015 01:54:58 -0400 Received: from mail-lf0-x232.google.com ([2a00:1450:4010:c07::232]:33111) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmF1b-0006PA-Et for qemu-devel@nongnu.org; Wed, 14 Oct 2015 01:54:55 -0400 Received: by lffv3 with SMTP id v3so6134640lff.0 for ; Tue, 13 Oct 2015 22:54:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=e7rQUzsMndZnBcX94m/BhOKDBOZBYIggEu1ohU/MWXQ=; b=UnkJnKgP0VVDQV96qj/ElVKQEB2IaJ9xSC8u6eqRtCrw4Q1XkkF/RHWM1bfV37UHwb ZFRZKouspzR5ZxHXFiQk7gWzIf4gy+n9Ms5WDp3eu/H3Ku1rKxCCJERaIEb/7R/oWXXx Pkw76BKgANP0/SJ0g59vdcCzcxuOqgDPAe4q1IbMMQwkcclqv+Y7DuW6gr4RegmG3+ws 1HsHkDmjPoLQEgEQ/iYrbltTPMc6J9dknAUDccDsO8ckDbi8hqphdv3is+wEqRmz4QYN ZQLy8Xf72WIB/mDldlE13p4+6Aeqbkhv7owKdBQB4ZKKxhaNcWnTrralIOi2QBTqIBVV jILg== X-Received: by 10.25.39.76 with SMTP id n73mr371224lfn.60.1444802094786; Tue, 13 Oct 2015 22:54:54 -0700 (PDT) Received: from octofox.metropolis ([5.19.183.212]) by smtp.gmail.com with ESMTPSA id c6sm1050808lbp.2.2015.10.13.22.54.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Oct 2015 22:54:54 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Date: Wed, 14 Oct 2015 08:54:27 +0300 Message-Id: <1444802068-27573-2-git-send-email-jcmvbkbc@gmail.com> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1444802068-27573-1-git-send-email-jcmvbkbc@gmail.com> References: <1444802068-27573-1-git-send-email-jcmvbkbc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2a00:1450:4010:c07::232 Cc: Max Filippov Subject: [Qemu-devel] [PATCH 1/2] target-xtensa: implement depbits instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This option provides an instruction for depositing a bit field from the least significant position of one register to an arbitrary position in another register. Signed-off-by: Max Filippov --- target-xtensa/cpu.h | 1 + target-xtensa/overlay_tool.h | 5 +++++ target-xtensa/translate.c | 20 ++++++++++++++++++++ 3 files changed, 26 insertions(+) diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 96bfc82..a45cb39 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -65,6 +65,7 @@ enum { XTENSA_OPTION_MP_SYNCHRO, XTENSA_OPTION_CONDITIONAL_STORE, XTENSA_OPTION_ATOMCTL, + XTENSA_OPTION_DEPBITS, /* Interrupts and exceptions */ XTENSA_OPTION_EXCEPTION, diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index eda03aa..e8a7fda 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -30,6 +30,10 @@ { .targno = (no), .type = (typ), .group = (grp), .size = (sz) }, #define XTREG_END { .targno = -1 }, +#ifndef XCHAL_HAVE_DEPBITS +#define XCHAL_HAVE_DEPBITS 0 +#endif + #ifndef XCHAL_HAVE_DIV32 #define XCHAL_HAVE_DIV32 0 #endif @@ -69,6 +73,7 @@ XCHAL_OPTION(XCHAL_HAVE_S32C1I, XTENSA_OPTION_CONDITIONAL_STORE) | \ XCHAL_OPTION(XCHAL_HAVE_S32C1I && XCHAL_HW_MIN_VERSION >= 230000, \ XTENSA_OPTION_ATOMCTL) | \ + XCHAL_OPTION(XCHAL_HAVE_DEPBITS, XTENSA_OPTION_DEPBITS) | \ /* Interrupts and exceptions */ \ XCHAL_OPTION(XCHAL_HAVE_EXCEPTIONS, XTENSA_OPTION_EXCEPTION) | \ XCHAL_OPTION(XCHAL_HAVE_VECBASE, XTENSA_OPTION_RELOCATABLE_VECTOR) | \ diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index f2118c2..cd2148e 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -1970,6 +1970,16 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) break; case 10: /*FP0*/ + /*DEPBITS*/ + if (option_enabled(dc, XTENSA_OPTION_DEPBITS)) { + if (!gen_window_check2(dc, RRR_S, RRR_T)) { + break; + } + tcg_gen_deposit_i32(cpu_R[RRR_T], cpu_R[RRR_T], cpu_R[RRR_S], + OP2, RRR_R + 1); + break; + } + HAS_OPTION(XTENSA_OPTION_FP_COPROCESSOR); switch (OP2) { case 0: /*ADD.Sf*/ @@ -2104,6 +2114,16 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) break; case 11: /*FP1*/ + /*DEPBITS*/ + if (option_enabled(dc, XTENSA_OPTION_DEPBITS)) { + if (!gen_window_check2(dc, RRR_S, RRR_T)) { + break; + } + tcg_gen_deposit_i32(cpu_R[RRR_T], cpu_R[RRR_T], cpu_R[RRR_S], + OP2 + 16, RRR_R + 1); + break; + } + HAS_OPTION(XTENSA_OPTION_FP_COPROCESSOR); #define gen_compare(rel, br, a, b) \