From patchwork Wed Oct 7 09:33:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 527179 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E4E41140D72 for ; Wed, 7 Oct 2015 20:34:34 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=koM5t3nM; dkim-atps=neutral Received: from localhost ([::1]:56470 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zjl7I-0002Ym-Qw for incoming@patchwork.ozlabs.org; Wed, 07 Oct 2015 05:34:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46313) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zjl6b-0001Od-UE for qemu-devel@nongnu.org; Wed, 07 Oct 2015 05:33:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zjl6X-0004x5-PY for qemu-devel@nongnu.org; Wed, 07 Oct 2015 05:33:49 -0400 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]:33798) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zjl6X-0004ww-Ic for qemu-devel@nongnu.org; Wed, 07 Oct 2015 05:33:45 -0400 Received: by padhy16 with SMTP id hy16so16502493pad.1 for ; Wed, 07 Oct 2015 02:33:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=CgEZGP9wPrHpAVqc2NvdvI/UQCvA616LfE4+dTzhj9o=; b=koM5t3nM8DxW1eLwbcdcmQx8zUYjMcAiVrtzoPx6kngRLZ28C+jK7+DYwfYWe4gWEi qqNTN4NnuOgBT0KYLQuPkBrxhUURc8/1d+7OAAIhunYW8zYjqciPuDdKIo298hXm63Ve fZCeK8+mXMpll7eq2oAoVJkq4zC5VvVLEb/jCSjiFGngfH0upqKx/Xjy0lbUSB1bzVRi yKeZrKv9a4dJbkhzV8LA5p+sn8o2StmHZp+upEIPR0lJaVVmNh7MVHiPLTl0DhzNar5F FWWvCIEA0qrggh1ZlByIbtxQfDaffnWU5RsrPgTAjWB26tZbcS5PEKptI8jbJjtJrnhn BXog== X-Received: by 10.68.137.202 with SMTP id qk10mr63365pbb.30.1444210425201; Wed, 07 Oct 2015 02:33:45 -0700 (PDT) Received: from bigtime.twiddle.net ([1.144.9.106]) by smtp.gmail.com with ESMTPSA id sv9sm38296997pbc.44.2015.10.07.02.33.42 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Oct 2015 02:33:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 7 Oct 2015 20:33:05 +1100 Message-Id: <1444210397-20679-8-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1444210397-20679-1-git-send-email-rth@twiddle.net> References: <1444210397-20679-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::230 Cc: peter.maydell@linaro.org Subject: [Qemu-devel] [PULL 07/19] target-tilegx: Implement complex multiply instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-tilegx/helper.c | 40 ++++++++++++++++++++++++++++++++++++++++ target-tilegx/helper.h | 3 +++ target-tilegx/translate.c | 31 ++++++++++++++++++++++++++++++- 3 files changed, 73 insertions(+), 1 deletion(-) diff --git a/target-tilegx/helper.c b/target-tilegx/helper.c index cad5dae..36b287f 100644 --- a/target-tilegx/helper.c +++ b/target-tilegx/helper.c @@ -97,3 +97,43 @@ uint64_t helper_crc32_32(uint64_t accum, uint64_t input) /* zlib crc32 converts the accumulator and output to one's complement. */ return crc32(accum ^ 0xffffffff, buf, 4) ^ 0xffffffff; } + +uint64_t helper_cmula(uint64_t srcd, uint64_t srca, uint64_t srcb) +{ + uint32_t reala = (int16_t)srca; + uint32_t imaga = (int16_t)(srca >> 16); + uint32_t realb = (int16_t)srcb; + uint32_t imagb = (int16_t)(srcb >> 16); + uint32_t reald = srcd; + uint32_t imagd = srcd >> 32; + uint32_t realr = reala * realb - imaga * imagb + reald; + uint32_t imagr = reala * imagb + imaga * realb + imagd; + + return deposit64(realr, 32, 32, imagr); +} + +uint64_t helper_cmulaf(uint64_t srcd, uint64_t srca, uint64_t srcb) +{ + uint32_t reala = (int16_t)srca; + uint32_t imaga = (int16_t)(srca >> 16); + uint32_t realb = (int16_t)srcb; + uint32_t imagb = (int16_t)(srcb >> 16); + uint32_t reald = (int16_t)srcd; + uint32_t imagd = (int16_t)(srcd >> 16); + int32_t realr = reala * realb - imaga * imagb; + int32_t imagr = reala * imagb + imaga * realb; + + return deposit32((realr >> 15) + reald, 16, 16, (imagr >> 15) + imagd); +} + +uint64_t helper_cmul2(uint64_t srca, uint64_t srcb, int shift, int round) +{ + uint32_t reala = (int16_t)srca; + uint32_t imaga = (int16_t)(srca >> 16); + uint32_t realb = (int16_t)srcb; + uint32_t imagb = (int16_t)(srcb >> 16); + int32_t realr = reala * realb - imaga * imagb + round; + int32_t imagr = reala * imagb + imaga * realb + round; + + return deposit32(realr >> shift, 16, 16, imagr >> shift); +} diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h index 72c8e92..82d84f1 100644 --- a/target-tilegx/helper.h +++ b/target-tilegx/helper.h @@ -6,6 +6,9 @@ DEF_HELPER_FLAGS_1(revbits, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_3(shufflebytes, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64) DEF_HELPER_FLAGS_2(crc32_8, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(crc32_32, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_3(cmula, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64) +DEF_HELPER_FLAGS_3(cmulaf, TCG_CALL_NO_RWG_SE, i64, i64, i64, i64) +DEF_HELPER_FLAGS_4(cmul2, TCG_CALL_NO_RWG_SE, i64, i64, i64, int, int) DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v1shl, TCG_CALL_NO_RWG_SE, i64, i64, i64) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 9f86fd3..d7e4d52 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -276,6 +276,15 @@ static void gen_mul_half(TCGv tdest, TCGv tsrca, TCGv tsrcb, tcg_temp_free(t); } +static void gen_cmul2(TCGv tdest, TCGv tsrca, TCGv tsrcb, int sh, int rd) +{ + TCGv_i32 tsh = tcg_const_i32(sh); + TCGv_i32 trd = tcg_const_i32(rd); + gen_helper_cmul2(tdest, tsrca, tsrcb, tsh, trd); + tcg_temp_free_i32(tsh); + tcg_temp_free_i32(trd); +} + static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca, unsigned srcb, TCGMemOp memop, const char *name) { @@ -759,13 +768,33 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, mnemonic = "cmpne"; break; case OE_RRR(CMULAF, 0, X0): + gen_helper_cmulaf(tdest, load_gr(dc, dest), tsrca, tsrcb); + mnemonic = "cmulaf"; + break; case OE_RRR(CMULA, 0, X0): + gen_helper_cmula(tdest, load_gr(dc, dest), tsrca, tsrcb); + mnemonic = "cmula"; + break; case OE_RRR(CMULFR, 0, X0): + gen_cmul2(tdest, tsrca, tsrcb, 15, 1 << 14); + mnemonic = "cmulfr"; + break; case OE_RRR(CMULF, 0, X0): + gen_cmul2(tdest, tsrca, tsrcb, 15, 0); + mnemonic = "cmulf"; + break; case OE_RRR(CMULHR, 0, X0): + gen_cmul2(tdest, tsrca, tsrcb, 16, 1 << 15); + mnemonic = "cmulhr"; + break; case OE_RRR(CMULH, 0, X0): + gen_cmul2(tdest, tsrca, tsrcb, 16, 0); + mnemonic = "cmulh"; + break; case OE_RRR(CMUL, 0, X0): - return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; + gen_helper_cmula(tdest, load_zero(dc), tsrca, tsrcb); + mnemonic = "cmul"; + break; case OE_RRR(CRC32_32, 0, X0): gen_helper_crc32_32(tdest, tsrca, tsrcb); mnemonic = "crc32_32";