From patchwork Sun Sep 27 21:28:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gabriel L. Somlo" X-Patchwork-Id: 523175 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 58C131401CD for ; Mon, 28 Sep 2015 07:31:12 +1000 (AEST) Received: from localhost ([::1]:58874 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZgJXK-0007xk-6W for incoming@patchwork.ozlabs.org; Sun, 27 Sep 2015 17:31:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40013) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZgJVV-00052M-Ew for qemu-devel@nongnu.org; Sun, 27 Sep 2015 17:29:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZgJVS-0005Zy-8O for qemu-devel@nongnu.org; Sun, 27 Sep 2015 17:29:17 -0400 Received: from relay-06.andrew.cmu.edu ([128.2.157.21]:60902 helo=relay.andrew.cmu.edu) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZgJVS-0005Zg-1P for qemu-devel@nongnu.org; Sun, 27 Sep 2015 17:29:14 -0400 Received: from HEDWIG.ini.cmu.edu (HEDWIG.INI.CMU.EDU [128.2.16.51]) by relay.andrew.cmu.edu (8.14.8/8.14.8) with ESMTP id t8RLT32B031446; Sun, 27 Sep 2015 17:29:03 -0400 From: "Gabriel L. Somlo" To: qemu-devel@nongnu.org Date: Sun, 27 Sep 2015 17:28:59 -0400 Message-Id: <1443389342-2186-3-git-send-email-somlo@cmu.edu> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1443389342-2186-1-git-send-email-somlo@cmu.edu> References: <1443389342-2186-1-git-send-email-somlo@cmu.edu> X-Scanned-By: MIMEDefang 2.74 on 128.2.157.21 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 128.2.157.21 Cc: peter.maydell@linaro.org, drjones@redhat.com, matt.fleming@intel.com, ehabkost@redhat.com, mst@redhat.com, zhaoshenglong@huawei.com, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, kevin@koconnor.net, kraxel@redhat.com, pbonzini@redhat.com, imammedo@redhat.com, markmb@redhat.com, lersek@redhat.com, rth@twiddle.net Subject: [Qemu-devel] [PATCH v4 2/5] pc: fw_cfg: move ioport base constant to pc.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Move BIOS_CFG_IOPORT define from pc.c to pc.h, and rename it to FW_CFG_IO_BASE. Signed-off-by: Gabriel Somlo Reviewed-by: Laszlo Ersek --- hw/i386/pc.c | 5 ++--- include/hw/i386/pc.h | 2 ++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 461c128..70a5898 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -86,7 +86,6 @@ void pc_set_legacy_acpi_data_size(void) acpi_data_size = 0x10000; } -#define BIOS_CFG_IOPORT 0x510 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) @@ -760,7 +759,7 @@ static FWCfgState *bochs_bios_init(void) int i, j; unsigned int apic_id_limit = pc_apic_id_limit(max_cpus); - fw_cfg = fw_cfg_init_io(BIOS_CFG_IOPORT); + fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE); /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: * * SeaBIOS needs FW_CFG_MAX_CPUS for CPU hotplug, but the CPU hotplug @@ -1292,7 +1291,7 @@ FWCfgState *xen_load_linux(PCMachineState *pcms, assert(MACHINE(pcms)->kernel_filename != NULL); - fw_cfg = fw_cfg_init_io(BIOS_CFG_IOPORT); + fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE); rom_set_fw(fw_cfg); load_linux(pcms, fw_cfg); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ab5413f..86007e3 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -211,6 +211,8 @@ typedef void (*cpu_set_smm_t)(int smm, void *arg); void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); +#define FW_CFG_IO_BASE 0x510 + /* acpi_piix.c */ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,