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[109.242.226.170]) by smtp.gmail.com with ESMTPSA id v10-20020a5d678a000000b0032d9f32b96csm569185wru.62.2023.10.13.01.48.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 01:48:25 -0700 (PDT) From: Emmanouil Pitsidianakis To: qemu-devel@nongnu.org Cc: Emmanouil Pitsidianakis , =?utf-8?q?C?= =?utf-8?q?=C3=A9dric_Le_Goater?= , Peter Maydell , Andrew Jeffery , Joel Stanley , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , qemu-arm@nongnu.org (open list:ARM cores), qemu-ppc@nongnu.org (open list:New World (mac99)) Subject: [RFC PATCH v3 43/78] hw/misc: add fallthrough pseudo-keyword Date: Fri, 13 Oct 2023 11:46:11 +0300 Message-Id: <14428b4bb4467c649e4e4a0f7f2ea20f1e9be46b.1697186560.git.manos.pitsidianakis@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=manos.pitsidianakis@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In preparation of raising -Wimplicit-fallthrough to 5, replace all fall-through comments with the fallthrough attribute pseudo-keyword. (Cédric Le Goater review for aspeed_scu.c) Reviewed-by: Cédric Le Goater Signed-off-by: Emmanouil Pitsidianakis --- hw/misc/a9scu.c | 2 ++ hw/misc/aspeed_scu.c | 2 +- hw/misc/bcm2835_property.c | 12 ++++++------ hw/misc/mos6522.c | 4 ++-- 4 files changed, 11 insertions(+), 9 deletions(-) diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index a375ebc987..b422bec3c4 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -38,6 +38,7 @@ static uint64_t a9_scu_read(void *opaque, hwaddr offset, case 0x50: /* SCU Access Control Register */ case 0x54: /* SCU Non-secure Access Control Register */ /* unimplemented, fall through */ + fallthrough; default: qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n", __func__, offset); @@ -69,6 +70,7 @@ static void a9_scu_write(void *opaque, hwaddr offset, case 0x50: /* SCU Access Control Register */ case 0x54: /* SCU Non-secure Access Control Register */ /* unimplemented, fall through */ + fallthrough; default: qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx " value 0x%"PRIx64"\n", diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 8335364906..4a1ea2fa21 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -672,7 +672,7 @@ static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, if (s->regs[reg + 2]) { return; } - /* fall through */ + fallthrough; case AST2600_SYS_RST_CTRL: case AST2600_SYS_RST_CTRL2: case AST2600_CLK_STOP_CTRL: diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c index 4ed9faa54a..98170f34a6 100644 --- a/hw/misc/bcm2835_property.c +++ b/hw/misc/bcm2835_property.c @@ -182,7 +182,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) fbconfig.yres = ldl_le_phys(&s->dma_as, value + 16); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated = true; - /* fall through */ + fallthrough; case RPI_FWREQ_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT: stl_le_phys(&s->dma_as, value + 12, fbconfig.xres); stl_le_phys(&s->dma_as, value + 16, fbconfig.yres); @@ -193,7 +193,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) fbconfig.yres_virtual = ldl_le_phys(&s->dma_as, value + 16); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated = true; - /* fall through */ + fallthrough; case RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_WIDTH_HEIGHT: stl_le_phys(&s->dma_as, value + 12, fbconfig.xres_virtual); stl_le_phys(&s->dma_as, value + 16, fbconfig.yres_virtual); @@ -206,7 +206,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) fbconfig.bpp = ldl_le_phys(&s->dma_as, value + 12); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated = true; - /* fall through */ + fallthrough; case RPI_FWREQ_FRAMEBUFFER_GET_DEPTH: stl_le_phys(&s->dma_as, value + 12, fbconfig.bpp); resplen = 4; @@ -218,7 +218,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) fbconfig.pixo = ldl_le_phys(&s->dma_as, value + 12); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated = true; - /* fall through */ + fallthrough; case RPI_FWREQ_FRAMEBUFFER_GET_PIXEL_ORDER: stl_le_phys(&s->dma_as, value + 12, fbconfig.pixo); resplen = 4; @@ -230,7 +230,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) fbconfig.alpha = ldl_le_phys(&s->dma_as, value + 12); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated = true; - /* fall through */ + fallthrough; case RPI_FWREQ_FRAMEBUFFER_GET_ALPHA_MODE: stl_le_phys(&s->dma_as, value + 12, fbconfig.alpha); resplen = 4; @@ -248,7 +248,7 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value) fbconfig.yoffset = ldl_le_phys(&s->dma_as, value + 16); bcm2835_fb_validate_config(&fbconfig); fbconfig_updated = true; - /* fall through */ + fallthrough; case RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_OFFSET: stl_le_phys(&s->dma_as, value + 12, fbconfig.xoffset); stl_le_phys(&s->dma_as, value + 16, fbconfig.yoffset); diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c index d6ba47bde9..a62349e6a0 100644 --- a/hw/misc/mos6522.c +++ b/hw/misc/mos6522.c @@ -320,7 +320,7 @@ uint64_t mos6522_read(void *opaque, hwaddr addr, unsigned size) break; case VIA_REG_A: qemu_log_mask(LOG_UNIMP, "Read access to register A with handshake"); - /* fall through */ + fallthrough; case VIA_REG_ANH: val = s->a; ctrl = (s->pcr & CA2_CTRL_MASK) >> CA2_CTRL_SHIFT; @@ -412,7 +412,7 @@ void mos6522_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) break; case VIA_REG_A: qemu_log_mask(LOG_UNIMP, "Write access to register A with handshake"); - /* fall through */ + fallthrough; case VIA_REG_ANH: s->a = (s->a & ~s->dira) | (val & s->dira); mdc->portA_write(s);