From patchwork Wed Sep 2 22:50:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 513682 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id BE4F814029E for ; Thu, 3 Sep 2015 08:51:01 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=NEw2uwJ7; dkim-atps=neutral Received: from localhost ([::1]:42126 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXGrr-0004yb-NA for incoming@patchwork.ozlabs.org; Wed, 02 Sep 2015 18:50:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40763) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXGrG-0004MP-8C for qemu-devel@nongnu.org; Wed, 02 Sep 2015 18:50:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXGrD-0001XZ-Eg for qemu-devel@nongnu.org; Wed, 02 Sep 2015 18:50:22 -0400 Received: from mail-pa0-x234.google.com ([2607:f8b0:400e:c03::234]:36606) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXGrD-0001Ww-1o for qemu-devel@nongnu.org; Wed, 02 Sep 2015 18:50:19 -0400 Received: by pacwi10 with SMTP id wi10so24990397pac.3 for ; Wed, 02 Sep 2015 15:50:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=8PPGdiVVbWlBpGJgqlkTgwSfDlrs/nqY3SqwmwIFax8=; b=NEw2uwJ781kTM8LVJJV/kTeRiWl1lPHNUJsxJ7WwF2a9v7UTkI+ssG1T1xSzVIPJWJ K0rO6vfjKY9cJs0WgwLkVlkPyEccZetFLbgWfZrJhsbFdkWyy4r8G7vTXBE6WNOe215w FK0wA2MQciXXEYL/rXl5gcy2Ex/BG9v52XueAU+wRW4sgNawk7RmlVM4zmDbpYnXeXqP jhSR6pl+RBoF1tnDWS/U+bOz4brt7JvCzg4Y/XKpdsHw9l74J4/Vb9LAzW2/3QyHbCqT L/+ZZhHSEs390dAKGsDg/JZftoeEPzy5B48b8oM10lDSaWNcZkfdfYQIfO+m2+s3c9d6 V0hQ== X-Received: by 10.66.241.2 with SMTP id we2mr59882978pac.99.1441234218175; Wed, 02 Sep 2015 15:50:18 -0700 (PDT) Received: from bigtime.twiddle.net (50-194-63-110-static.hfc.comcastbusiness.net. [50.194.63.110]) by smtp.gmail.com with ESMTPSA id qb9sm22821314pbb.95.2015.09.02.15.50.17 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 02 Sep 2015 15:50:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 2 Sep 2015 15:50:14 -0700 Message-Id: <1441234214-25173-3-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1441234214-25173-1-git-send-email-rth@twiddle.net> References: <1441234214-25173-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c03::234 Cc: leon.alrae@imgtec.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH v2 2/2] target-mips: Use tcg_gen_extrh_i64_i32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We can tidy gen_load_fpr32h, as well as introduce a helper to cleanup the MACC instructions. Signed-off-by: Richard Henderson Reviewed-by: Leon Alrae --- target-mips/translate.c | 48 ++++++++++++++++++++++-------------------------- 1 file changed, 22 insertions(+), 26 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index e8e6f53..040f4bd 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1666,10 +1666,7 @@ static void gen_store_fpr32_tl(DisasContext *ctx, TCGv t, int reg) static void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg) { if (ctx->hflags & MIPS_HFLAG_F64) { - TCGv_i64 t64 = tcg_temp_new_i64(); - tcg_gen_shri_i64(t64, fpu_f64[reg], 32); - tcg_gen_extrl_i64_i32(t, t64); - tcg_temp_free_i64(t64); + tcg_gen_extrh_i64_i32(t, fpu_f64[reg]); } else { gen_load_fpr32(ctx, t, reg | 1); } @@ -1744,12 +1741,23 @@ static target_long addr_add(DisasContext *ctx, target_long base, return sum; } +/* Sign-extract the low 32-bits to a target_long. */ static inline void gen_move_low32(TCGv ret, TCGv_i64 arg) { #if defined(TARGET_MIPS64) - tcg_gen_ext32s_tl(ret, arg); + tcg_gen_ext32s_i64(ret, arg); +#else + tcg_gen_extrl_i64_i32(ret, arg); +#endif +} + +/* Sign-extract the high 32-bits to a target_long. */ +static inline void gen_move_high32(TCGv ret, TCGv_i64 arg) +{ +#if defined(TARGET_MIPS64) + tcg_gen_sari_i64(ret, arg, 32); #else - tcg_gen_trunc_i64_tl(ret, arg); + tcg_gen_extrh_i64_i32(ret, arg); #endif } @@ -3667,12 +3675,9 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc, tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]); tcg_gen_add_i64(t2, t2, t3); tcg_temp_free_i64(t3); - tcg_gen_trunc_i64_tl(t0, t2); - tcg_gen_shri_i64(t2, t2, 32); - tcg_gen_trunc_i64_tl(t1, t2); + gen_move_low32(cpu_LO[acc], t2); + gen_move_high32(cpu_HI[acc], t2); tcg_temp_free_i64(t2); - tcg_gen_ext32s_tl(cpu_LO[acc], t0); - tcg_gen_ext32s_tl(cpu_HI[acc], t1); } opn = "madd"; break; @@ -3689,12 +3694,9 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc, tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]); tcg_gen_add_i64(t2, t2, t3); tcg_temp_free_i64(t3); - tcg_gen_trunc_i64_tl(t0, t2); - tcg_gen_shri_i64(t2, t2, 32); - tcg_gen_trunc_i64_tl(t1, t2); + gen_move_low32(cpu_LO[acc], t2); + gen_move_high32(cpu_HI[acc], t2); tcg_temp_free_i64(t2); - tcg_gen_ext32s_tl(cpu_LO[acc], t0); - tcg_gen_ext32s_tl(cpu_HI[acc], t1); } opn = "maddu"; break; @@ -3709,12 +3711,9 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc, tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]); tcg_gen_sub_i64(t2, t3, t2); tcg_temp_free_i64(t3); - tcg_gen_trunc_i64_tl(t0, t2); - tcg_gen_shri_i64(t2, t2, 32); - tcg_gen_trunc_i64_tl(t1, t2); + gen_move_low32(cpu_LO[acc], t2); + gen_move_high32(cpu_HI[acc], t2); tcg_temp_free_i64(t2); - tcg_gen_ext32s_tl(cpu_LO[acc], t0); - tcg_gen_ext32s_tl(cpu_HI[acc], t1); } opn = "msub"; break; @@ -3731,12 +3730,9 @@ static void gen_muldiv(DisasContext *ctx, uint32_t opc, tcg_gen_concat_tl_i64(t3, cpu_LO[acc], cpu_HI[acc]); tcg_gen_sub_i64(t2, t3, t2); tcg_temp_free_i64(t3); - tcg_gen_trunc_i64_tl(t0, t2); - tcg_gen_shri_i64(t2, t2, 32); - tcg_gen_trunc_i64_tl(t1, t2); + gen_move_low32(cpu_LO[acc], t2); + gen_move_high32(cpu_HI[acc], t2); tcg_temp_free_i64(t2); - tcg_gen_ext32s_tl(cpu_LO[acc], t0); - tcg_gen_ext32s_tl(cpu_HI[acc], t1); } opn = "msubu"; break;