From patchwork Fri Aug 28 08:54:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Liang Z" X-Patchwork-Id: 511816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7C2211401AF for ; Fri, 28 Aug 2015 18:56:15 +1000 (AEST) Received: from localhost ([::1]:46811 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZVFSH-0006VI-DK for incoming@patchwork.ozlabs.org; Fri, 28 Aug 2015 04:56:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40220) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZVFRd-0005eI-MA for qemu-devel@nongnu.org; Fri, 28 Aug 2015 04:55:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZVFRY-0002aS-Ij for qemu-devel@nongnu.org; Fri, 28 Aug 2015 04:55:33 -0400 Received: from mga02.intel.com ([134.134.136.20]:8086) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZVFRY-0002aG-D1 for qemu-devel@nongnu.org; Fri, 28 Aug 2015 04:55:28 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP; 28 Aug 2015 01:55:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,424,1437462000"; d="scan'208";a="777351007" Received: from ll.sh.intel.com (HELO localhost) ([10.239.13.27]) by fmsmga001.fm.intel.com with ESMTP; 28 Aug 2015 01:55:24 -0700 From: Liang Li To: qemu-devel@nongnu.org Date: Fri, 28 Aug 2015 16:54:12 +0800 Message-Id: <1440752053-16961-2-git-send-email-liang.z.li@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440752053-16961-1-git-send-email-liang.z.li@intel.com> References: <1440752053-16961-1-git-send-email-liang.z.li@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Cc: amit.shah@redhat.com, pbonzini@redhat.com, yang.z.zhang@intel.com, Liang Li , quintela@redhat.com Subject: [Qemu-devel] [PATCH 1/2] cutils: add the AVX2 optimization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org For platform that supports AVX2 instructions, use the AVX2 instructions instead of SSE2 instructions in buffer_find_nonzero_offset() can help to improve the performance about 30%. Zero page check during live migration can be faster with this optimization. Signed-off-by: Liang Li --- include/qemu-common.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/qemu-common.h b/include/qemu-common.h index bbaffd1..629fcac 100644 --- a/include/qemu-common.h +++ b/include/qemu-common.h @@ -468,6 +468,13 @@ void qemu_hexdump(const char *buf, FILE *fp, const char *prefix, size_t size); /* altivec.h may redefine the bool macro as vector type. * Reset it to POSIX semantics. */ #define bool _Bool +#elif defined __AVX2__ +#include +#define VECTYPE __m256i +#define SPLAT(p) _mm256_set1_epi8(*(p)) +#define ALL_EQ(v1, v2) \ + (_mm256_movemask_epi8(_mm256_cmpeq_epi8(v1, v2)) == 0xFFFFFFFF) +#define VEC_OR(v1, v2) (_mm256_or_si256(v1, v2)) #elif defined __SSE2__ #include #define VECTYPE __m128i