diff mbox

target-mips: fix semihosting for microMIPS R6

Message ID 1438603279-12432-1-git-send-email-leon.alrae@imgtec.com
State New
Headers show

Commit Message

Leon Alrae Aug. 3, 2015, 12:01 p.m. UTC
In semihosting mode the SDBBP 1 instructions should trigger UHI syscall,
but in QEMU this does not happen for recently added microMIPS R6.
Consequently bare metal microMIPS R6 programs supporting UHI will not run.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
---
 target-mips/translate.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

Comments

Aurelien Jarno Aug. 3, 2015, 9:31 p.m. UTC | #1
On 2015-08-03 13:01, Leon Alrae wrote:
> In semihosting mode the SDBBP 1 instructions should trigger UHI syscall,
> but in QEMU this does not happen for recently added microMIPS R6.
> Consequently bare metal microMIPS R6 programs supporting UHI will not run.
> 
> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
> ---
>  target-mips/translate.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
diff mbox

Patch

diff --git a/target-mips/translate.c b/target-mips/translate.c
index d1de35a..e299643 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -13278,10 +13278,14 @@  static void gen_pool16c_r6_insn(DisasContext *ctx)
             break;
         case R6_SDBBP16:
             /* SDBBP16 */
-            if (ctx->hflags & MIPS_HFLAG_SBRI) {
-                generate_exception(ctx, EXCP_RI);
+            if (is_uhi(extract32(ctx->opcode, 6, 4))) {
+                gen_helper_do_semihosting(cpu_env);
             } else {
-                generate_exception(ctx, EXCP_DBp);
+                if (ctx->hflags & MIPS_HFLAG_SBRI) {
+                    generate_exception(ctx, EXCP_RI);
+                } else {
+                    generate_exception(ctx, EXCP_DBp);
+                }
             }
             break;
         }