From patchwork Thu Jul 30 18:36:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 502253 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44CB81402A0 for ; Fri, 31 Jul 2015 04:52:07 +1000 (AEST) Received: from localhost ([::1]:41534 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKsw1-0008WF-8M for incoming@patchwork.ozlabs.org; Thu, 30 Jul 2015 14:52:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39092) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKsvj-0008CC-JQ for qemu-devel@nongnu.org; Thu, 30 Jul 2015 14:51:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZKsvi-0001Tu-M9 for qemu-devel@nongnu.org; Thu, 30 Jul 2015 14:51:47 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34797) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKsvi-0001T3-Fk for qemu-devel@nongnu.org; Thu, 30 Jul 2015 14:51:46 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZKsh4-0004t4-Ap; Thu, 30 Jul 2015 19:36:38 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 30 Jul 2015 19:36:38 +0100 Message-Id: <1438281398-18746-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1438281398-18746-1-git-send-email-peter.maydell@linaro.org> References: <1438281398-18746-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: "Edgar E. Iglesias" , patches@linaro.org Subject: [Qemu-devel] [PATCH 4/4] target-arm: Implement missing ACTLR registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We already implemented ACTLR_EL1; add the missing ACTLR_EL2 and ACTLR_EL3, for consistency. Since we don't currently have any CPUs that need the EL2/EL3 versions to reset to non-zero values, implement as RAZ/WI. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias --- target-arm/helper.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index d286680..b0b1a22 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3637,13 +3637,22 @@ void register_cp_regs_for_features(ARMCPU *cpu) } if (arm_feature(env, ARM_FEATURE_AUXCR)) { - ARMCPRegInfo auxcr = { - .name = "ACTLR_EL1", .state = ARM_CP_STATE_BOTH, - .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 1, - .access = PL1_RW, .type = ARM_CP_CONST, - .resetvalue = cpu->reset_auxcr + ARMCPRegInfo auxcr_reginfo[] = { + { .name = "ACTLR_EL1", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 1, + .access = PL1_RW, .type = ARM_CP_CONST, + .resetvalue = cpu->reset_auxcr }, + { .name = "ACTLR_EL2", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 0, .opc2 = 1, + .access = PL2_RW, .type = ARM_CP_CONST, + .resetvalue = 0 }, + { .name = "ACTLR_EL3", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 0, .opc2 = 1, + .access = PL3_RW, .type = ARM_CP_CONST, + .resetvalue = 0 }, + REGINFO_SENTINEL }; - define_one_arm_cp_reg(cpu, &auxcr); + define_arm_cp_regs(cpu, auxcr_reginfo); } if (arm_feature(env, ARM_FEATURE_CBAR)) {