From patchwork Fri Jun 12 10:40:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 483476 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8A90B140280 for ; Fri, 12 Jun 2015 20:41:41 +1000 (AEST) Received: from localhost ([::1]:50492 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MP5-0004wx-OK for incoming@patchwork.ozlabs.org; Fri, 12 Jun 2015 06:41:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38645) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MOF-0003hT-Dj for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z3MOC-0002xH-QY for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:47 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:56265) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3MOC-0002wh-Kl for qemu-devel@nongnu.org; Fri, 12 Jun 2015 06:40:44 -0400 Received: from weber.rr44.fr ([2001:470:d4ed:0:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1Z3MOB-0004Gy-4H; Fri, 12 Jun 2015 12:40:43 +0200 Received: from aurel32 by weber.rr44.fr with local (Exim 4.85) (envelope-from ) id 1Z3MO9-0000CT-W2; Fri, 12 Jun 2015 12:40:41 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Fri, 12 Jun 2015 12:40:35 +0200 Message-Id: <1434105638-642-9-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1434105638-642-1-git-send-email-aurelien@aurel32.net> References: <1434105638-642-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:101::1 Cc: Aurelien Jarno Subject: [Qemu-devel] [PULL 08/11] target-sh4: optimize negc using add2 and sub2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index b8abfd5..9ab3ba0 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -795,12 +795,12 @@ static void _decode_opc(DisasContext * ctx) return; case 0x600a: /* negc Rm,Rn */ { - TCGv t0 = tcg_temp_new(); - tcg_gen_neg_i32(t0, REG(B7_4)); - tcg_gen_sub_i32(REG(B11_8), t0, cpu_sr_t); - tcg_gen_setcondi_i32(TCG_COND_GTU, cpu_sr_t, t0, 0); - tcg_gen_setcond_i32(TCG_COND_GTU, t0, REG(B11_8), t0); - tcg_gen_or_i32(cpu_sr_t, cpu_sr_t, t0); + TCGv t0 = tcg_const_i32(0); + tcg_gen_add2_i32(REG(B11_8), cpu_sr_t, + REG(B7_4), t0, cpu_sr_t, t0); + tcg_gen_sub2_i32(REG(B11_8), cpu_sr_t, + t0, t0, REG(B11_8), cpu_sr_t); + tcg_gen_andi_i32(cpu_sr_t, cpu_sr_t, 1); tcg_temp_free(t0); } return;